1Semiconductor
FEDL7731-02-04
MSM7731-02
Digital Output Timing (Normal-sync)
BCLK
SYNC
PCMO
PCMEO
0
1
2
3
4
5
6
7
8
9
10
tBS
tSB
tWS
tSDX
tXD1
tXD2
tXD3
Hi-Z
MSB
LSB Hi-Z
Digital Output Timing (Short-frame-sync)
BCLK
SYNC
PCMO
PCMEO
0
1
2
3
4
5
6
7
8
9
10
tBS
tSB
tWS
tXD1
tXD2
MSB
Hi-Z
tXD3
LSB Hi-Z
Digital Interface Characteristics (3/3)
Parameter
MCU Interface Digital
Input/Output Setting Time
EXCK Clock Frequency
Symbol
tM1
tM2
tM3
tM4
tM5
tM6
tM7
tM8
tM9
tM10
tM11
fEXCK
Condition
—
—
—
—
—
—
RD = 1 kΩ, CDL = 20 pF
RD = 1 kΩ, CDL = 20 pF
—
RD = 1 kΩ, CDL = 20 pF
—
—
(VDD = 2.7 to 3.6 V, Ta = –25 to +85°C)
Min.
Typ.
Max.
Unit
20
—
—
ns
20
—
—
ns
50
—
—
ns
100
—
—
ns
50
—
—
ns
50
—
—
ns
—
—
30
ns
0
—
—
ns
50
—
—
ns
—
—
30
ns
100
—
—
ns
—
—
10
MHz
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