¡ Semiconductor
Digital Interface Characteristics
Parameter
Digital Output Delay Time
PCM, ADPCM Interface
Serial Port
Digital Input/Output
Setting Time
Shift Clock Frequency
Symbol
Condition
tSDX, tSDR 1LSTTL+100 pF
tXD1, tRD1
pull-up resistance : 500 W
Values in parentheses apply when
tXD2, tRD2 Cload = 10 pF,
tXD3, tRD3 pull-up resistance :£2 kW
tM1 Cload=100 pF
tM2
tM3
tM4
tM5
tM6
tM7
tM8
tM9
tM10
tM11
tM12
fECK EXCK
MSM7718-01
(VDD= 2.7 to 3.6 V, Ta= –25 to +70°C)
Min. Typ. Max. Unit
0
— 200 (100) ns
0
— 200 (100) ns
0
— 200 (100) ns
0
— 200 (100) ns
50
—
—
ns
20
—
—
ns
20
—
—
ns
50
—
—
ns
100 —
—
ns
50
—
—
ns
50
—
—
ns
0
—
—
ns
50
—
—
ns
50
—
—
ns
0
—
—
ns
100 —
—
—
—
ns
10
MHz
PCM/ADPCM Output Timing
BCLKP
0
1
2
3
4
5
6
7
8
9
10
tXS
tSX
tWS
SYNCP
PCMPCO
PCMADO
PCMLNO
PCMACO
tXO tXD1
tXD2
MSB
tSDX
tXD3
LSB
Note : The timing for PCMADO, PCMLNO, and PCMACO shown above reperesents the timing
when time slot 1 is selected.
BCLKA
SYNCA
IS
0
1
2
3
4
5
6
7
8
9
10
tXS
tSX
tXO
tSDX
tXD1
tXD2
MSB
tXD3
LSB
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