AD7776AN データシートの表示（PDF） - Analog Devices
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AD7776AN Datasheet PDF : 12 Pages
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AD7776/AD7777/AD7778
state (as programmed by CR9), and the SAR contents are trans-
ferred to the first register ADCREG1. The SAR is then reset in
readiness for a new conversion. If simultaneous sampling has
been requested (CR6 = 1), no change occurs in the status of the
BUSY/INT output and the ADC automatically starts the second
conversion. At the end of this conversion the BUSY/INT line
changes state (as programmed by CR9) and the SAR contents
are transferred to the second register, ADCREG2.
WR
tD*
CLKIN
VIN
40ns
TYP
40ns
TYP
CHANNEL ACQUISITION
'HOLD'
DB9 (MSB)
* TIMING SHOWN FOR tD GREATER THAN 12ns
Figure 6. ADC Conversion Start Timing
Track-and-Hold
The track-and-hold (T/H) amplifiers on the analog input(s) of
the AD7776/AD7777/AD7778 allow the ADC to accurately
convert an input sine wave of 2 V peak-peak amplitude up to a
frequency of 189 kHz, the Nyquist frequency of the ADC when
operated at its maximum throughput rate of 378 kHz. This
maximum rate of conversion includes conversion time and time
between conversions. Because the input bandwidth of the track-
and-hold is much greater than 189 kHz, the input signal should
be band limited to avoid folding unwanted signals into the band
of interest.
Powerdown
The AD7776/AD7777/AD7778 can be placed in a powerdown
mode simply by writing a logic high to location CR8 of the con-
trol register. The following changes are effected immediately on
writing a “1” to location CR8:
• Any conversion in progress is terminated.
• If a conversion is in progress, the leading edge of WR immedi-
ately drives the BUSY/INT output high.
• All the linear circuitry is turned off.
• The REFOUT output stops being driven and is weakly (5 kΩ)
pulled to analog ground.
Control inputs CS, WR and RD retain their purpose while the
AD7776/ AD7777/AD7778 is in powerdown. If no conversions
are in progress when the AD7776/AD7777/AD7778 is placed
into the powerdown modes, the contents of the ADC registers,
ADCREG1 and ADCREG2, are retained during powerdown
and can be read as normal. On returning to normal operating
mode a new conversion (or conversions, dependent on CR6) is
automatically started. On completion, the invalid conversion
results are loaded into the ADC registers losing the previous
valid results.
In order to achieve the lowest possible power consumption in
the powerdown mode special attention must be paid to the state
of the digital and analog inputs and outputs:
• Because each analog input channel sees a resistive divider to
AGND, the input resistance of which does not change be-
tween normal and powerdown modes, driving the analog input
signals to 0 V or as close as possible to 0 V will minimize the
power dissipated in the input signal conditioning circuitry.
• Similarly, the REFIN input sees a resistive divider to AGND,
the input resistance of which does not change between normal
and powerdown modes. If an external reference is being used,
then driving this reference input to 0 V or as close as possible
to 0 V will minimize the power dissipated in the input signal
conditioning circuitry.
• Since the REFOUT pin is pulled to AGND via, typically, a
5 kΩ resistor, any voltage above 0 V that this output may be
pulled to by external circuitry will dissipate unnecessary
power.
• Digital inputs CS, WR & RD should all be held at VCC or as
close as possible. CLKIN should be held as close as possible
to either 0 V or VCC.
• Since the BUSY/INT output is actively driven to a logic high,
any loading on this pin to 0 V will dissipate power.
The AD7776/AD7777/AD7778 comes out of the powerdown
mode when a Logic “0” is written to location CR8 of the con-
trol register. Note that the contents of the other locations in the
control register are retained when the device is placed in
powerdown and are valid when power is restored. However,
coming out of powerdown provides an opportunity to reload
the complete contents of the control register without any extra
instructions.
REV. 0
–7–
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