AD7776AN データシートの表示（PDF） - Analog Devices

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AD7776AN

LC2MOS, High Speed 1-, 4-, & 8-Channel 10-Bit ADCs

Analog Devices 

AD7776/AD7777/AD7778

Changing the Analog Input Voltage Range

By biasing the RTN pin above AGND it is possible to change

the analog input voltage range from its VBIAS ± VSWING format to

a more traditional 0 V to VREF range. The new input range can

be described as

VOFFSET to (VOFFSET + REFIN)

where 0 V ≤ VOFFSET ≤ 1 V. To produce this range the RTN pin

must be biased to (REFIN – 2 VOFFSET). For instance if

RTN is tied to REFOUT then the analog input range becomes

0 V to 2 V. The fixed 2 V analog input voltage span of the ADC

can range from 1 V to 3 V (RTN = 0 V) to 0 V to 2 V (RTN =

2 V), i.e., with proper biasing, an input signal range from 0.3 V

to 2.3 V can be covered. Both the relative accuracy and differen-

tial nonlinearity performance remains essentially unchanged in

this mode while the SNR and THD performance are typically

2 dB to 3 dB worse than standard.

OUTLINE DIMENSIONS

Dimensions shown in inches and (mm).

R-24

24-Lead Wide-Body SOIC

24

0.299 (7.6)

0.291 (7.4)

PIN 1

1

13

0.419 (10.65)

0.394 (10.00)

12

0.012 (0.3)

0.004 (0.1)

0.614 (15.6)

0.598 (15.2)

0.050 (1.27)

BSC

0.019 (0.49)

0.014 (0.35)

0.104 (2.65)

0.093 (2.35)

0.013 (0.32)

0.009 (0.23)

R-28

28-Lead Wide-Body SOIC

0.005 (1.27)

0.015 (0.40)

28

0.299 (7.60)

0.291 (7.39)

PIN 1

1

0.01 (0.254)

0.006 (0.15)

15

0.414 (10.52)

0.398 (10.10)

14

0.708 (18.02)

0.696 (17.67)

0.096 (2.44)

0.089 (2.26)

0.03 (0.76)

0.02 (0.51)

0.050 (1.27)

BSC

0.019 (0.49)

0.014 (0.35)

0.013 (0.32)

0.009 (0.23)

1. LEAD NO. 1 IDENTIFIED BY A DOT.

2. SOIC LEADS WILL BE EITHER TIN PLATED OF SOLDER DIPPED

IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS.

0.042 (1.067)

0.018 (0.457)

REV. 0

–11–

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