![](/html/Motorola/490931/page4.png)
MC74HC4514
tf
CHIP
90%
50%
SELECT 10%
tPLH
OUTPUT Y
90%
50%
10%
tTLH
SWITCHING WAVEFORMS
tr
VCC
GND
tPHL
INPUT A
tPLH
tTHL
OUTPUT Y
VALID
50%
50%
VALID
VCC
GND
tPHL
Figure 1.
Figure 2.
LATCH
ENABLE
OUTPUT Y
tw
50%
tPLH
50%
VCC
50%
GND
tPHL
Figure 3.
VALID
VCC
INPUT A
50%
GND
tsu
th
LATCH
ENABLE
VCC
50%
GND
Figure 4.
DEVICE
UNDER
TEST
TEST POINT
OUTPUT
CL*
* Includes all probe and jig capacitance
Figure 5. Test Circuit
MOTOROLA
4
High–Speed CMOS Logic Data
DL129 — Rev 6