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M312L2920BG0-A2 データシートの表示(PDF) - Samsung

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M312L2920BG0-A2
Samsung
Samsung Samsung
M312L2920BG0-A2 Datasheet PDF : 18 Pages
First Prev 11 12 13 14 15 16 17 18
1GB, 2GB Registered DIMM
DDR SDRAM
AC Operating Conditions
Parameter/Condition
Input High (Logic 1) Voltage, DQ, DQS and DM signals
Input Low (Logic 0) Voltage, DQ, DQS and DM signals.
Input Differential Voltage, CK and CK inputs
Input Crossing Point Voltage, CK and CK inputs
Symbol
Min
Max
Unit
VIH(AC) VREF + 0.31
V
VIL(AC)
VREF - 0.31
V
VID(AC)
0.7
VDDQ+0.6
V
VIX(AC) 0.5*VDDQ-0.2 0.5*VDDQ+0.2
V
Note
3
3
1
2
Note : 1. VID is the magnitude of the difference between the input level on CK and the input on CK.
2. The value of VIX is expected to equal 0.5*VDDQ of the transmitting device and must track variations in the DC level of the same.
3. These parameters should be tested at the pim on actual components and may be checked at either the pin or the pad in
simulation. the AC and DC input specificatims are refation to a Vref envelope that has been bandwidth limited 20MHz.
Vtt=0.5*VDDQ
Output
RT=50
Z0=50
CLOAD=30pF
VREF
=0.5*VDDQ
Input/Output Capacitance
Output Load Circuit (SSTL_2)
Parameter
Symbol
Input capacitance(A0 ~ A12, BA0 ~ BA1,RAS,CAS,WE )
Input capacitance(CKE0)
Input capacitance( CS0)
Input capacitance( CLK0, CLK0 )
Input capacitance(DM0~DM8)
Data & DQS input/output capacitance(DQ0~DQ63)
Data input/output capacitance (CB0~CB7)
CIN1
CIN2
CIN3
CIN4
CIN5
Cout1
Cout2
(VDD=2.5V, VDDQ=2.5V, TA= 25°C, f=1MHz)
M312L2920BG0
Unit
Min
Max
9
11
pF
9
11
pF
9
11
pF
11
12
pF
10
11
pF
10
11
pF
10
11
pF
Parameter
M312L2923BG0, M312L5720BG0
Unit
Symbol
Min
Max
Input capacitance(A0 ~ A12, BA0 ~ BA1,RAS,CAS,WE ) CIN1
9
11
pF
Input capacitance(CKE0,CKE1)
CIN2
9
11
pF
Input capacitance( CS0, CS1)
CIN3
9
11
pF
Input capacitance( CLK0, CLK0 )
CIN4
11
12
pF
Input capacitance(DM0~DM8)
CIN5
13
15
pF
Data & DQS input/output capacitance(DQ0~DQ63)
Cout1
13
15
pF
Data input/output capacitance (CB0~CB7)
Cout2
13
15
pF
Rev. 1.1 August. 2003

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