L6382D データシートの表示（PDF） - STMicroelectronics

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L6382D

Power management unit for LED drivers

STMicroelectronics 

L6382D

Block description

7.3

Drivers

 LSD (low-side driver): it consists of a level shifter from 3.3 V logic signal (LSI) to Vcc

MOS driving level; conceived for the half-bridge low-side power MOS, it is able to

source and sink 120 mA (min).

 HSD (level shifter and high-side driver): it consists of a level shifter from 3.3 V logic

signal (HGI) to the high-side gate driver input up to 600 V. Conceived for the half-bridge

high-side power MOS, the HSG is able to source and sink 120 mA.

 PFD (power factor driver): it consists of a level shifter from 3.3 V logic signal (PFI) to

Vcc MOS driving level: the driver is able to source 120 mA from Vcc to PFG (turn-on)

and to sink 250 mA to GND (turn-off). It is suitable to drive the MOS of the PFC pre-

regulator stage.

 HED (auxiliary driver): it consists of a level shifter from 3.3 V logic signal (HEI) to Vcc

MOS driving level; the driver is able to source 30 mA from Vcc to HEG and to sink 75

mA to GND.

 Bootstrap circuit: it generates the supply voltage for the high-side driver (HSD).

A patented integrated bootstrap section replaces an external bootstrap diode. This

section together with a bootstrap capacitor provides the bootstrap voltage to drive the

high-side power MOSFET. This function is achieved using a high voltage DMOS driver

which is driven synchronously with the low-side external power MOSFET. For safe

operation, current flow between the BOOT pin and Vcc is always inhibited, even though

ZVS operation may not be ensured.

7.4

Internal logic, overcurrent protection (OCP) and interlocking

function

The DIM (digital input monitor) block manages the input signals delivered to the drivers

ensuring that they are low during the described startup procedure; the DIM block controls

the L6382D behavior during both save and operating modes.

When the voltage on pin CSI exceeds the internal reference of 0.5 V (typ.) the block latches

the fault condition: in this state the OCP block forces low both HSG and LSG signals while

CSO will be forced high. This condition remains latched until LSI and HSI are

simultaneously low and CSI is below 0.5 V.

This function is suitable to implement overcurrent protection or hard-switching detection by

using an external sense resistor.

As the voltage on pin CSI can go negative, the current must be limited below 2 mA by

external components.

Another feature of the DIM block is the internal interlocking that prevents cross conduction

in the half-bridge FETs. If by chance both HGI and LGI inputs are brought high at the same

time, then LSG and HSG are forced low as long as this critical condition persists.

DocID10972 Rev 8

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