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L6382D データシートの表示(PDF) - STMicroelectronics

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L6382D
ST-Microelectronics
STMicroelectronics ST-Microelectronics
L6382D Datasheet PDF : 21 Pages
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L6382D
Application information
6.2.1
6.2.2
As the Vcc voltage reaches the startup threshold (14 V typ.) the chip starts operating and
the HV generator is switched off.
To summarize:
– the high voltage startup generator is active
– VREF is disabled with an additional sinking circuit on pin VREF enabled
– TPR is disabled
– OCP is disabled
– the drivers are disabled
Save mode
This mode is entered after the Vcc voltage reaches the turn-on threshold; the VREF is
enabled in low current source mode to supply the C connected to it, the required wakeup
current of which must be less than 10 mA: if no switching activity is detected at the LGI
input, the high voltage startup generator cycles ON-OFF, keeping the Vcc voltage between
VccON and VccSM.
Summarizing:
– the high voltage startup generator is cycling
– VREF is enabled in low source current capability (IREF 10 mA)
– TPR circuit is disabled
– OCP is disabled
the drivers are disabled.
If the Vcc voltage falls below the VREF(OFF) threshold, the device enters the startup mode.
Operating mode
After 10 s in save mode and only if the voltage at VREF is higher than 3.0 V, on the falling
edge on the HGI input, the drivers are enabled as well as all the IC functions; this is the
mode corresponding to the proper lamp behavior.
To summarize:
– HVSU is OFF
– VREF is enabled in high source current mode (IREF < 30 mA)
– TPR circuit is enabled
– OCP is enabled
– the drivers are enabled
If there is no switching activity on LGI for more than 100 s, the IC returns to save mode.
DocID10972 Rev 8
13/21
21

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