IDTCV144 データシートの表示（PDF） - Integrated Device Technology

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IDTCV144

PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR

Integrated Device Technology 

IDTCV144

PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR

COMMERCIAL TEMPERATURE RANGE

BYTE 6

Bit

Output(s) Affected

Description / Function

0

1

Type

0

CPU[2:0]

FSA latched value on power up

R

1

CPU[2:0]

FSB latched value on power up

R

2

CPU[2:0]

FSC latched value on power up

R

3

PCI, SRC

Software PCI_STOP control for Stop all PCI, PCIF, and Software STOP

RW

PCI and SRC CLK

SRC which can be stopped

Disabled

by PCI_STOP#

4

REF1

Output Enable. Only valid when

Disable

Enable

RW

Byte 1, Bit 4 is HIGH

5

Reserved

RW

6

Test clock mode entry control

Normal operation

Test mode, controlled

RW

by Byte 6, Bit 7

7

CPU, SRC, PCI

Only valid when Byte 6, Bit 7

Hi-Z

PCIF, REF,

is HIGH

USB48, DOT96

REF/N

RW

Power On

FSA

FSB

FSC

1

1

0

0

0

BYTE 7

Bit

Output(s) Affected

Description / Function

0

0

Vendor ID

1

Vendor ID

2

Vendor ID

3

Vendor ID

4

Revision ID

5

Revision ID

6

Revision ID

7

Revision ID

1

Type

Power On

R

1

R

0

R

1

R

0

R

0

R

0

R

0

R

0

BYTE 8, BLOCK READ BYTE COUNT

Bit

Output(s) Affected

Description / Function

0

0

1

2

3

4

5

6

7

8

1

Type

Power On

0

1

1

0

1

0

0

0

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