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IDT82V2048E データシートの表示(PDF) - Integrated Device Technology

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IDT82V2048E
IDT
Integrated Device Technology IDT
IDT82V2048E Datasheet PDF : 76 Pages
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OCTAL CHANNEL T1/E1/J1 SHORT HAUL LINE INTERFACE UNIT
INDUSTRIAL
TEMPERATURE RANGES
LIST OF FIGURES
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Block Diagram ................................................................................................................. 2
IDT82V2048E PQFP208 Package Pin Assignment ........................................................ 8
IDT82V2048E PBGA208 Package Pin Assignment (top view) ....................................... 9
E1 Waveform Template Diagram .................................................................................. 16
E1 Pulse Template Test Circuit ..................................................................................... 16
DSX-1 Waveform Template .......................................................................................... 16
T1 Pulse Template Test Circuit ..................................................................................... 17
Receive Path Function Block Diagram .......................................................................... 21
Transmit/Receive Line Circuit ....................................................................................... 21
Monitoring Receive Line in Another Chip ...................................................................... 22
Monitor Transmit Line in Another Chip .......................................................................... 22
G.772 Monitoring Diagram ............................................................................................ 23
Jitter Attenuator ............................................................................................................. 24
LOS Declare and Clear ................................................................................................. 25
Analog Loopback .......................................................................................................... 28
Digital Loopback ............................................................................................................ 28
Remote Loopback ......................................................................................................... 28
Auto Report Mode ......................................................................................................... 30
Manual Report Mode ..................................................................................................... 31
TCLK Operation Flowchart ............................................................................................ 32
Serial Processor Interface Function Timing .................................................................. 33
JTAG Architecture ......................................................................................................... 55
JTAG State Diagram ..................................................................................................... 58
Transmit System Interface Timing ................................................................................ 66
Receive System Interface Timing ................................................................................. 66
E1 Jitter Tolerance Performance .................................................................................. 67
T1/J1 Jitter Tolerance Performance .............................................................................. 67
E1 Jitter Transfer Performance ..................................................................................... 69
T1/J1 Jitter Transfer Performance ................................................................................ 69
JTAG Interface Timing .................................................................................................. 70
Serial Interface Write Timing ......................................................................................... 71
Serial Interface Read Timing with SCLKE=1 ................................................................ 71
Serial Interface Read Timing with SCLKE=0 ................................................................ 71
Non_multiplexed Motorola Read Timing ....................................................................... 72
Non_multiplexed Motorola Write Timing ....................................................................... 73
Non_multiplexed Intel Read Timing .............................................................................. 74
Non_multiplexed Intel Write Timing .............................................................................. 75
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