ICS570AT(2000) データシートの表示（PDF） - Integrated Circuit Systems
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ICS570AT Datasheet PDF : 6 Pages
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ICS570A
Multiplier and Zero Delay Buffer
All jitter values measured at 25 °C with 27Ω series termination resistors and 15pF loads on both CLK and
CLK/2. The feedback is from CLK/2 to FBIN. Note that if an output is unused, it should be left
unconnected. This will give lower output jitter.
One Sigma Clock Period Jitter (ps), VDD = 3.3 V
CLK
CLK/2
ICLK
Frequency
(MHz)
<5
CLK Frequency (MHz)
<20 20 - 50 >50
145 70
85
ICLK
Frequency
(MHz)
CLK/2 Frequency (MHz)
<10 10 - 25 >25
<5 200 100 20
5 - 10 100 65
85
>10 —
50
85
5 - 10 135 70 20
>10 —
50
20
Absolute Clock Period Jitter (ps), VDD = 3.3V
CLK
ICLK
Frequency
(MHz)
CLK Frequency (MHz)
<20 20 - 50 >50
<5
5 - 10
>10
±850
±370
—
±350
±270
±140
±180
±180
±180
One Sigma Clock Period Jitter (ps), VDD = 5 V
CLK
ICLK
Frequency
(MHz)
CLK Frequency (MHz)
<20 20 - 50 >50
<5 130 100 120
5 - 10 120 100 120
>10 —
70
120
Absolute Clock Period Jitter (ps), VDD = 5 V
CLK
ICLK
Frequency
(MHz)
CLK Frequency (MHz)
<20 20 - 50 >50
<5 ±270 ±180 ±230
5 - 10 ±270 ±220 ±230
>10 — ±160 ±230
CLK/2
ICLK
CLK/2 Frequency (MHz)
Frequency
(MHz) <10 10 - 25 >25
<5 ±1100 ±600 ±90
5 - 10 ±500 ±350 ±90
>10 — ±160 ±90
CLK/2
ICLK
Frequency
(MHz)
<5
5 - 10
>10
CLK/2 Frequency (MHz)
<10 10 - 25 >25
50 25
20
60 35
20
— 30
25
CLK/2
ICLK
Frequency
(MHz)
CLK/2 Frequency (MHz)
<10 10 - 25 >25
<5 ±170 ±100 ±50
5 - 10 ±210 ±100 ±80
>10 — ±100 ±90
MDS 570A C
4
Revision 102700
Printed 11/14/00
Integrated Circuit Systems, Inc .• 525 Race Street • San Jose • CA •95126• (408)295-9800tel •www.icst.com
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