GS1582(2007) データシートの表示（PDF） - Gennum -> Semtech
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GS1582
(Rev.:2007)
(Rev.:2007)
Gennum -> Semtech
GS1582 Datasheet PDF : 114 Pages
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GS1582 Data Sheet
Table 1-1: Pin Descriptions (Continued)
Pin
Number
Name
Timing
Type Description
D3
D4
D6, D7, D8,
E4, E8, F8
E3
E10
F1, F2, H1,
H2, J1, J2,
J3, K1, K2,
K3
STANDBY
SDO_EN/DIS
NC
SD/HD
CD_VDD
DIN[9:0]
Non
Synchronous
Non
Synchronous
–
Input
Input
–
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
Power down input.
When set HIGH, the device will be in standby mode.
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
Used to enable or disable the serial digital output stage.
When set LOW, the serial digital output signals SDO and SDO are
disabled and become high impedance.
When set HIGH, the serial digital output signals SDO and SDO are
enabled.
The SDO and SDO outputs will also be high impedance when the
RESET pin is LOW.
No connect. Not connected internally.
Non
Synchronous
Analog
Synchronous
with PCLK
Input
Input
Power
Input
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
When set LOW, the device will be configured to transmit signals of
1.485Gb/s - 1.485/1.001Gb/s rates only.
When set HIGH, the device will be configured to transmit signals of a
270Mb/s rate only.
Power supply connection for the serial digital cable driver. Connect to
+3.3V DC analog.
PARALLEL DATA BUS
Signal levels are LVCMOS/LVTTL compatible.
DIN9 is the MSB and DIN0 is the LSB.
HD 20-bit mode
SD/HD = LOW
20bit/10bit = HIGH
Chroma data input in SMPTE mode
SMPTE_BYPASS =HIGH
DVB_ASI = LOW
Data input in Data-Through mode
SMPTE_BYPASS = LOW
DVB_ASI = LOW
HD 10-bit mode
SD/HD = LOW
20bit/10bit = LOW
High impedance in all modes.
SD 20-bit mode
SD/HD = HIGH
20bit/10bit = HIGH
Chroma data input in SMPTE mode
SMPTE_BYPASS = HIGH
DVB_ASI = LOW
Data input in Data-Through mode
SMPTE_BYPASS = LOW
DVB_ASI = LOW
Forced low in DVB-ASI mode
SMPTE_BYPASS = LOW
DVB_ASI = HIGH
SD 10-bit mode
SD/HD = HIGH
20bit/10bit = LOW
High impedance in all modes.
40117 - 1 November 2007
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