ADIS16229AMLZ データシートの表示（PDF） - Analog Devices

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ADIS16229AMLZ

Digital MEMS Vibration Sensor w/ Embedded RF Transceiver

Analog Devices 

ADIS16000/ADIS16229

Preliminary Technical Data

THEORY OF OPERATION

The ADIS16000 is the “Gateway Node” and the ADIS16229 serves

as the remote “Sensor Node” in a wireless vibration monitoring

system. Using a proprietary wireless protocol, one ADIS16000 can

support up to six ADIS16229 nodes at one time in local star

network configuration (see Figure 8). As the gateway node, the

ADIS16000’s SPI interface provides access to an addressable

register map that manages configuration parameters (gateway and

sensor node), remote alarm flags and remote vibration data. The

ADIS16000’s SPI interface enables simple connection to most

embedded processors and its standard SMA connector supports

direct connection to a wide variety of antennas. The ADIS16229

only requires an antenna and battery to start-up, connect with the

ADIS16000 and begin operation.

SENSING ELEMENT

Digital vibration sensing in the ADIS16229 starts with a MEMS

accelerometer core on two different axes. Accelerometers

translate linear changes in velocity into a representative

electrical signal, using a micromechanical system like the one

shown in Figure 6. The mechanical part of this system includes

two different frames (one fixed, one moving) that have a series

of plates to form a variable, differential capacitive network.

When experiencing the force associated with gravity or

acceleration, the moving frame changes its physical position

with respect to the fixed frame, which results in a change in

capacitance. Tiny springs tether the moving frame to the fixed

frame and govern the relationship between acceleration and

physical displacement. A modulation signal on the moving plate

feeds through each capacitive path into the fixed frame plates and

into a demodulation circuit, which produces the electrical signal

that is proportional to the acceleration acting on the device.

ANCHOR

PLATE

CAPACITORS

MOVABLE

FRAME

UNIT SENSING

CELL

FIXED

PLATES

MOVING

PLATE

UNIT

FORCING

CELL

ANCHOR

Figure 6. MEMS Sensor Diagram

SIGNAL PROCESSING

Figure 9 offers a simplified block diagram for the ADIS16229.

The signal processing stage includes time-domain data capture,

digital decimation/filtering, windowing, FFT analysis, FFT

averaging, and record storage. See Figure 16 for more details

on the signal processing operation.

SENSOR COMMUNICATION

The ADIS16000 provides access to the ADIS16229 through

dedicated pages in the register structure. When the ADIS16000

communicates with a remote ADIS16229, it copies all

configuration information in these registers to their respective

locations in the ADIS16229 and acquires all of the data in the

ADIS16229’s output registers/data records.

GATEWAY COMMUNICATION

SPI Interface

The data collection and configuration command uses the SPI,

which consists of four wires. The chip select (CS) signal

activates the SPI interface, and the serial clock (SCLK)

synchronizes the serial data lines. Input commands clock into

the DIN pin, one bit at a time, on the SCLK rising edge. Output

data clocks out of the DOUT pin on the SCLK falling edge.

Since the ADIS16000 serves only as a SPI slave, the DOUT

contents reflect the information requested using a DIN

command.

Register organization

The ADIS16000’s memory map contains 7 pages of user

accessible registers, which enable simple organization of both

local (gateway) and remote (sensor) functions. Each page has a

page control register (PAGE_ID) address 0x00. Before

accessing a register within a particular page, write that page’s

identification number to this register. For example, write “2” to

the PAGE_ID register to access sensor node #2. Once a

particular page has been “accessed,” there is no need to write the

same value to PAGE_ID, in order to access the rest of the

registers within that page

Each 16-bit register has its own unique bit assignment and two

addresses: one for its upper byte and one for its lower byte.

Table 9 and Table 10 provide more details on these memory

maps, which list each register, along with its function and lower

byte address.

Table 6. ADIS16000 Register Map Page Organization

PAGE_ID Function

Reference

0x0000

Gateway configuration

Table 9

0x0001

Sensor Node #1

Table 10

0x0002

Sensor Node #2

Table 10

0x0003

Sensor Node #3

Table 10

0x0004

Sensor Node #4

Table 10

0x0005

Sensor Node #5

Table 10

0x0006

Sensor Node #6

Table 10

Dual-Memory Structure

The user registers provide addressing for all input/output

operations in the SPI interface. The control registers use a dual-

Rev. PrA | Page 8 of 37

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