L6232E データシートの表示（PDF） - STMicroelectronics
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L6232E Datasheet PDF : 10 Pages
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L6232E
ELECTRICAL CHARACTERISTICS (continued)
Symbol
Gm
Zout
VINH
VINL
IINH(leak)
IINL
td onU
tdonL
td offU
tdoffL
dV/dt
dV/dt
dV/dt
FC
Toff
T sd
Tsdr
Parameter
LIN Error Amplifier
Transconductance
Error Amplifier Output
Impedance
Logic Input Voltage BRK; INUA;
INUB; INUC; INLA; INLB; INLC
Logic Input Current BRK; INUA;
INUB; INUC; INLA; INLB; INLC
Upper/Lower Turn-on Delay
Test Condition
Vi = 2.7V
Vi = 0.4V
Table 1 see Fig. 3
Upper/Lower Turn-off Delay
Source DMOS Slew-Rate
(PWM)
Source DMOS Slew-Rate (LIN)
Sink DMOS Output Turn-off
Slew-Rate
Internal Clock Frequency
PWM Cutoff Time
Shutdown Temperature
Recovery Temperature
see Fig. 3
see Fig. 3
Note 3; R = 100KΩ
R=100KΩ; C=180pF, Note 4;
see Fig. 2
Notes:
1) The Head Park time must be shorter than the Brake Delay time td(BRK) = RdCd
2) Both in PWM and in LIN mode the Ref. Voltage must agree to Vref=GV RS Imotor
3) The resistance of the RC network defines the dv/dt value.
4) toff = 1.8RC + 6 ⋅ 10-6
Min.
Typ. Max. Unit
0.8
mA/V
2
MΩ
2
V
0.8
V
-1
mA
-0.1 mA
0.7
µs
0.15
µs
15
µs
0.5
µs
10
V/µs
1
V/µs
0.15
V/µs
380
KHz
40
µs
160
°C
120
°C
Table 1
INUA
L
L
H
H
INUB
L
L
H
H
H = The Upper DMOS is ON
L = The Lower DMOS is ON
* = Tristate condition
INPUT STATE
INUC
INLA
L
H
L
L
H
L
H
H
INLB
H
L
L
H
INLC
H
L
L
H
OUTPUT STATE
A
B
C
*
*
*
H
H
H
*
*
*
L
L
L
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