15.1.4
15.1.5
15.1.6
15.1.7
15.1.8
15.1.9
15.1.10
15.1.11
15.1.12
15.1.13
15.1.14
15.1.15
15.1.16
15.1.17
15.1.18
15.1.19
15.1.20
15.1.21
15.1.22
15.1.23
15.1.24
15.1.25
15.1.26
15.1.27
15.1.28
15.1.29
15.1.30
15.1.31
15.1.32
15.1.33
PCISTS – PCI Status Register
(PCI Express – D28:F0/F1/F2/F3) ........................................................ 539
RID – Revision Identification Register
(PCI Express – D28:F0/F1/F2/F3) ........................................................ 539
PI – Programming Interface Register
(PCI Express – D28:F0/F1/F2/F3) ........................................................ 540
SCC – Sub Class Code Register
(PCI Express – D28:F0/F1/F2/F3) ........................................................ 540
BCC – Base Class Code Register
(PCI Express – D28:F0/F1/F2/F3) ........................................................ 540
CLS – Cache Line Size Register
(PCI Express – D28:F0/F1/F2/F3) ........................................................ 540
PLT – Primary Latency Timer Register
(PCI Express – D28:F0/F1/F2/F3) ........................................................ 540
HEADTYP – Header Type Register
(PCI Express – D28:F0/F1/F2/F3) ........................................................ 541
BNUM – Bus Number Register
(PCI Express – D28:F0/F1/F2/F3) ........................................................ 541
IOBL – I/O Base and Limit Register
(PCI Express – D28:F0/F1/F2/F3) ........................................................ 541
SSTS – Secondary Status Register
(PCI Express – D28:F0/F1/F2/F3) ........................................................ 542
MBL – Memory Base and Limit Register
(PCI Express – D28:F0/F1/F2/F3) ........................................................ 542
PMBL – Prefetchable Memory Base and Limit Register
(PCI Express – D28:F0/F1/F2/F3) ........................................................ 543
PMBU32 – Prefetchable Memory Base Upper 32 Bits
Register (PCI Express – D28:F0/F1/F2/F3) ............................................ 543
PMLU32 – Prefetchable Memory Limit Upper 32 Bits
Register (PCI Express – D28:F0/F1/F2/F3) ............................................ 543
CAPP – Capabilities List Pointer Register
(PCI Express – D28:F0/F1/F2/F3) ........................................................ 543
INTR – Interrupt Information Register
(PCI Express – D28:F0/F1/F2/F3) ........................................................ 544
BCTRL – Bridge Control Register
(PCI Express – D28:F0/F1/F2/F3) ........................................................ 544
CLIST – Capabilities List Register
(PCI Express – D28:F0/F1/F2/F3) ........................................................ 545
XCAP – PCI Express Capabilities Register
(PCI Express – D28:F0/F1/F2/F3) ........................................................ 545
DCAP – Device Capabilities Register
(PCI Express – D28:F0/F1/F2/F3) ........................................................ 545
DCTL – Device Control Register
(PCI Express – D28:F0/F1/F2/F3) ........................................................ 546
DSTS – Device Status Register
(PCI Express – D28:F0/F1/F2/F3) ........................................................ 547
LCAP – Link Capabilities Register
(PCI Express – D28:F0/F1/F2/F3) ........................................................ 547
LCTL – Link Control Register
(PCI Express – D28:F0/F1/F2/F3) ........................................................ 548
LSTS – Link Status Register (PCI Express – D28:F0/F1/F2/F3) ................. 549
SLCAP – Slot Capabilities Register
(PCI Express – D28:F0/F1/F2/F3) ........................................................ 549
SLCTL – Slot Control Register
(PCI Express – D28:F0/F1/F2/F3) ........................................................ 550
SLSTS – Slot Status Register
(PCI Express – D28:F0/F1/F2/F3) ........................................................ 551
RCTL – Root Control Register
(PCI Express – D28:F0/F1/F2/F3) ........................................................ 551
14
Intel® 631xESB/632xESB I/O Controller Hub Datasheet