T7264 データシートの表示（PDF） - Agere -> LSI Corporation

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T7264

U-Interface 2B1Q Transceiver

Agere -> LSI Corporation 

T7264 U-Interface 2B1Q Transceiver

Data Sheet

April 1998

Device Interface and Connections

(continued)

Idle Mode

A low-power idle mode is implemented on the T7264 to

reduce the power consumption to typically 30 mW when

it is not active. All internal coefficients are saved in this

idle mode to reduce time for a subsequent start-up.

There are three ways that idle mode can be entered:

s If the loop is operational, the local deactivation com-

mand (ldea) in the LT mode via the K2 interface

causes the deactivation procedure specified in the

ANSI standard. At the conclusion of the deactivation

procedure, shutdown of the line driver and activation

of the tone detector occurs. If no tone is detected

within 48 ms, the idle mode is entered. This 48 ms

window constitutes the RECEIVE RESET criteria in

the ANSI standard.

s If a failure condition is encountered (e.g., the loop

never comes up), a procedure similar to deactivation

is followed. The only difference is the duration of the

window, which is set internally by the type of failure

condition.

s As long as either the afrst (via the K2 interface) or

the RESET pin is active, the transceiver remains in

the powerup reset state. At the cessation of the reset

condition, the transceiver changes to the idle state.

There are four ways of bringing the device out of the

idle mode:

s An initiate start-up procedure (istp) command is

received via the K2 interface by the device.

s A reset (afrst or external RESET) command is

received by the device.

s A tone is detected by the tone detector.

s A command to enter any of the test modes (loopback

and insertion loss) is received by the device.

Internal timing ensures that the digital signal processor

blocks do not change state during the idle mode-to-

powerup process. In addition, the start-up process has

been designed to prevent glitches on the line as the

driver powers up.

NT Maintenance

ANSI T1.601-1992 defines NT quiet mode operation

and an insertion loss measurement, and support for

these is available from the T7264. Detection of the trig-

ger signals is done by other hardware which notifies the

system controller, and the system controller then sig-

nals the T7264 as needed to do the following:

s To enter the quiet mode, the chip is placed in reset.

s When an insertion loss measurement is requested,

ILOSS (pin 9) is asserted low. This causes the trans-

mitter to continuously send SN1 and places the

receiver in reset. When the test is completed or ter-

minated, ILOSS is asserted high and the chip is

reset. Priority between RESET and ILOSS is

described in the Priority section of this document

(page 31).

10

Lucent Technologies Inc.

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