PI6C673FA データシートの表示（PDF） - Pericom Semiconductor
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PI6C673FA
Pericom Semiconductor
PI6C673FA Datasheet PDF : 10 Pages
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PI6C673F 133 MHz Single Chip Mobile Clock
Supports 440BX/ VIA Promedia Chipset
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Power Management: Clock Enable Configuration*
CPU_STOP# PCI_STOP# PWR_DWN#
CPUCLK
PCICLK
Other Clock:
SDRAM, REF,
48/24 MHzA
48/24 MHzB
X
X
0
low
low
low
0
0
1
low
low
running
0
1
1
low
running
running
1
0
1
running
low
running
1
1
1
running running
running
*Full clock cycle timing is guaranteed at all times after initially powered up.
Crystal,
VCOs
off
running
running
running
running
PI6C673 Power Management Requirements
Signal
CPU_STOP#
PCI_STOP#
PWR_DWN#
Signal state
1 (enabled)(1)
0 (disabled)(2)
1 (enabled)(1)
0 (disabled)(2)
1 (normal operation)(3)
0 (power down)
Latency: No. of rising edges of
free-running PCICLK
1
1
1
1
2
2
Notes:
1. Clock ON latency is defined from when the clock enable goes active to the first valid clock.
2. Clock OFF latency is defined from when the clock enable goes inactive to the last clock is driven low out of the device.
3. Power UP latency is when PWR_DWN# goes inactive (HIGH) to when the first valid clocks are driven from the device.
I2C Serial Interface
By using standard I2C command bytes, the I2C registers can be written.
The ID number at Byte 8 can be read back for identification purposes.
Address Assignment
A6
A5
A4
A3
A2
Al
A0 R/W
1
1
0
1
0
0
1
-----
Data Protocol
1 bit
7 bits
1
1
8 bits
1
Start bit Slave Addr R/W Ack Command Code Ack Byte Count = N
1 bit
8 bits
1
8 bits
1
8 bits
1
1
ACK Data Byte 1 ACK Data Byte 2 ACK --- Data Byte N ACK STOP
3
PS8400B
05/01/00
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