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HIP1011B データシートの表示(PDF) - Intersil

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HIP1011B
Intersil
Intersil Intersil
HIP1011B Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
Typical Performance Curves
340
HIP1011B
1000
105
320
NMOS -12 rON
900
95
300
800
85
PMOS +12 rON
280
700
75
3V OCVTH
5V OCVTH
260
0
600
5 10 15 20 25 30 35 40 45 50 55 60 65 70
TEMPERATURE (oC)
FIGURE 1. rON vs TEMPERATURE
102
65
0 5 10 15 20 25 30 35 40 45 50 55 60 65 70
TEMPERATURE (oC)
FIGURE 2. OC VTH vs TEMPERATURE (VROCSET = 1.21V)
9.5
101
9.4
100
9.3
99
9.2
98
0 5 10 15 20 25 30 35 40 45 50 55 60 65 70
TEMPERATURE (oC)
FIGURE 3. OCSET CURRENT vs TEMPERATURE
Adjusting the Fault Reporting and Power
Supply Latch-Off Delay Times
Figure 5 illustrates the relationship between the FLTN signal
and the gate drive outputs. Duration a, indicates the time
between FLTN starting to transition from High to Low,
(indicating a fault has occurred) and the start of the gate
drive outputs latching off. The latch-off is initiated by the
falling FLTN signal reaching the output latch threshold
voltage, VFLTN, TH. For additional details and wave forms
see HIP1011A Data Sheet FN4631. Table 1 illustrates the
effect of the FLTN capacitor on the response times.
TABLE 1. RESPONSE TIME TABLE
3V5VG Response a
0.001µF
0.85µs
0.1µF
37µs
10µF
3.8ms
9.1
0
5 10 15 20 25 30 35 40 45 50 55 60 65 70
TEMPERATURE (oC)
FIGURE 4. VCC POWER ON RESET VTH vs TEMPERATURE
VFLTN,TH
FLTN
a
3V5VG
T1
T2
FIGURE 5. TIMING DIAGRAM
6
FN4640.5
November 18, 2004

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