General Description
Along with the sixteen PBCs, four FibreTimer digital Clock Recovery Units (CRUs) can be configured as Repeaters or Retimers. Repeaters, which attenuate jitter, are normally located at the input to the loop and retransmit recovered data synchronously to the recovered clock. Retimers, which eliminate jitter transfer, are normally located at the outputs of the loop and retransmit data synchronously to the reference clock in order to provide complete Fibre Channel jitter compliance at the output.

FEATUREs
• All the functionality needed to implement a complete daisy-chainable 16-drive 1Gb/s FC-AL JBOD Subsystem
• Two host ports with two pairs of FibreTimerTM Clock Recovery Units (CRUs) configurable as either Repeaters or Retimers
• Sixteen Port Bypass Circuits (PBC) for drive control
• Sixteen PBC internal Snoop LoopTM for loop diagnostics
• Configurable as either a single 16-drive loop or two 8-drive loops
• I2C interface for configuration/status/control
• Seamless interface to Enclosure Management Chipsets such as the Vitesse SSC100/VSC055 for managed JBOD applications
• On-chip terminators selectable as 100/150 ohm
• 3.3V Power Supply, 4.3 W
• 256-pin, 27mm Thermally Enhanced BGA