General Description
The TH7111 receiver IC consists of the following building blocks:
◾ PLL synthesizer (PLL SYNTH) for generation of the first and second local oscillator signals LO1 and LO2
◾ Parts of the PLL SYNTH are the high-frequency VCO1, the feedback dividers DIV_16 and DIV_2, a phase-frequency detector (PFD) with charge pump (CP) and a crystal-based reference oscillator (RO)
◾ Low-noise amplifier (LNA) for high-sensitivity RF signal reception
◾ First mixer (MIX1) for down-conversion of the RF signal to the first IF (IF1)
◾ second mixer (MIX2) for down-conversion of the IF1 to the second IF (IF2)
◾ IF amplifier (IFA) to amplify and limit the IF2 signal and for RSSI generation
◾ Phase coincidence demodulator (DEMOD) with third mixer (MIX3) to demodulate the IF signal
◾ Operational amplifier (OA) for data slicing, filtering, ASK detection and automatic-frequency control (AFC)
◾ Bias circuitry for bandgap biasing and circuit shutdown

FEATUREs
❐ Double superhet architecture for high degree of image rejection
❐ FSK for digital data and FM reception for analog signal transmission
❐ FM/FSK demodulation either with phase-coincidence or PLL demodulator
❐ Low current consumption in active mode and very low standby current
❐ Switchable LNA gain for improved dynamic range
❐ AFC feature allows wide carrier frequency acceptance range
❐ RSSI allows signal strength indication and ASK detection
❐ Surface mount package LQFP44

APPLICATION Examples
❐ General digital and analog 868 MHz or 915 MHz ISM band usage
❐ Low-power telemetry
❐ Alarm and security systems
❐ Keyless car and central locking
❐ Pagers