The SN54 /74LS113A offers individual J, K, set, and clock inputs. These monolithicdual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted. The logic level of the J and K inputsmay be allowed to change when the clock pulse is HIGH and the bistablewill perform according to the truth table as longas minimum setup timesare observed. Input data is transferred to the outputs on the negative-going edge of the clock pulse.