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SMJ44C256 データシート - Austin Semiconductor

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SMJ44C256

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Austin-Semiconductor
Austin Semiconductor Austin-Semiconductor

description
The SMJ44C256 series is a set of high-speed, 1048576-bit dynamic random access memories (DRAMs), organized as 262 144 words of four bits each. These devices employ technology for high performance, reliability, and low power.
These devices feature maximum RAS access times of 80 ns, 100 ns,120 ns, and 150 ns. Maximum power dissipation is as low as 305 mW operating and 16.5 mW standby on 150-ns devices.
ICC peaks are 140 mA typical, and an input voltage undershoot of –1 V can be tolerated, minimizing system noise considerations.
All inputs and outputs, including clocks, are compatible with Series 54/174 TTL. All addresses and data-in lines are latched on-chip to simplify system design. Data out is unlatched to allow greater system flexibility.
The SMJ44C256 is offered in 20-pin ceramic dual-in-line packages (JD suffix) and 20/26-terminal ceramic leadless carriers (FQ/HL suffixes), 20/26-pin leaded carrier (HJ suffix), a 20-pin flatpack (HK suffix), and a 20-pin ceramic zig-zag in-line package (SV suffix). They are specified for operation from –55°C to125°C.

● Organization . . . 262144 Words × 4 Bits
● Single 5-V Supply (10% Tolerance)
● Processed to MIL-STD-833, Class B
● Performance Ranges:
                            ACCESS    ACCESS   ACCESS   READ
                              TIME          TIME       TIME     OR
                            ta(R)           ta(C)      ta(CA)     WRITE
                           (tRAC)       (tCAC)    (tCAA)    CYCLE
                            (MAX)       (MAX)     (MAX)     (MIN)
   SMJ44C256-80      80 ns      20 ns     40 ns      150 ns
   SMJ44C256-10     100 ns      25 ns    45 ns      190 ns
   SMJ44C256-12     120 ns      30 ns    55 ns      220 ns
   SMJ44C256-15     150 ns      40 ns    70 ns      260 ns
● Enhanced Page-Mode Operation With CAS-Before-RAS (CBR) Refresh
● Long Refresh Period 512-Cycle Refresh in 8 ms (Max)
● All Inputs and Clocks are TTL Compatible
● 3-State Unlatched Output
● Low Power Dissipation
● Packaging Offered:
      – 20-Pin 300-Mil Ceramic DIP (JD Suffix)
      – 20-Lead Ceramic Surface-Mount Package (HJ Suffix)
      – 20-Pin Ceramic Flat Pack (HK Suffix)
      – 20-Terminal Leadless Ceramic Surface-Mount Package (FQ Suffix)
      – 20-Terminal Low-Profile Leadless Ceramic Surface-Mount Package (HL Suffix)
      – 20-Pin Ceramic Zig Zag In-Line Package (SV Suffix)
● Operating Free-Air Temperature Range
   – 55°C to 125°C

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部品番号
コンポーネント説明
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メーカー
1048576 by 1-bit dynamic random-access memory
Austin Semiconductor
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