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Vishay Semiconductors
DESCRIPTION
The attached spice model describes the typical electrical characteristics of the n- and p-channel vertical DMOS. The subcircuit model is extracted and optimized over the -55 to 125°C temperature ranges under the pulsed 0 to 10V gate drive. The saturated output impedance is best fit at the gate bias near the threshold voltage.
CHARACTERISTICS
• N- and P-Channel Vertical DMOS
• Macro Model (Subcircuit Model)
• Level 3 MOS
• Apply for both Linear and Switching Application
• Accurate over the -55 to 125°C Temperature Range
• Model the Gate Charge, Transient, and Diode Reverse Recovery Characteristics
N- and P-Channel 30-V (D-S) MOSFET
Vishay Semiconductors
N- and P-Channel 30 V (D-S) MOSFET
Vishay Semiconductors
N- and P-Channel 30 V (D-S) MOSFET
VBsemi Electronics Co.,Ltd
N- and P-Channel 30 V (D-S) MOSFET
VBsemi Electronics Co.,Ltd
N- and P-Channel 30 V (D-S) MOSFET
VBsemi Electronics Co.,Ltd
N- and P-Channel 30 V (D-S) MOSFET
VBsemi Electronics Co.,Ltd
N- and P-Channel 30-V (D-S) MOSFET
Vishay Semiconductors
N- and P-Channel 30 V (D-S) MOSFET
VBsemi Electronics Co.,Ltd
N- and P-Channel 30 V (D-S) MOSFET
VBsemi Electronics Co.,Ltd
N- and P-Channel 30 V (D-S) MOSFET
VBsemi Electronics Co.,Ltd