datasheetbank_Logo
データシート検索エンジンとフリーデータシート
HOME  >>>  Samsung  >>> S5PV210 PDF

S5PV210 データシート - Samsung

S5PV210 image

部品番号
S5PV210

コンポーネント説明

Other PDF
  no available.

PDF
DOWNLOAD     

page
84 Pages

File Size
1.5 MB

メーカー
Samsung
Samsung Samsung

SYSTEM OVERVIEW

SMDK S5PV210 ( S5PV210 Development Kit) is a platform for code development of SAMSUNGs S5PV210 16/32-bit RISC microcontroller (ARM-CORTEX A8). S5PV210 is used in hand-held devices and general applications.

The S5PV210 is a 32-bit RISC cost-effective, low power, high performance microprocessor solution for mobile phones and general applications, and integrates an ARM Cortex-A8 which implements the ARM architecture V7-A with supporting numerous peripherals.

To provide optimized Hardware (H/W) performance for the 3G and 3.5G communication services, S5PV210 adopts 64-bit internal bus architecture and includes many powerful hardware accelerators for tasks such as motion video processing, display control and scaling. Integrated Multi Format Codec (MFC) supports encoding and decoding of MPEG-1/2/4, H.263, H.264 and decoding of VC1, Divx. This Hardware accelerators support realtime video conferencing and Analog TV out, HDMI for NTSC and PAL mode

The S5PV210 has an optimized interface to external memory capable of sustaining the demanding memory bandwidths required in high-end communication services. The memory system has Flash/ ROM external memory ports for parallel access and DRAM port for high bandwidth. DRAM port can be configured to support LPDDR1(=mobile DDR), DDR2 or LPDDR2.

Flash/ROM Port supports NAND Flash, NOR-Flash, OneNAND, SRAM and ROM type external memory.

To reduce total system cost and enhance overall functionality, S5PV210 includes many hardware peripherals such as TFT 24-bit true color LCD controller, Camera Interface, MIPI DSI, CSI-2, System Manager for power management, ATA I/F, 4 UART, 24-channel DMA, 4 Timers, General I/O Ports, 3 IIS, S/PDIF, 3 IIC-BUS interface, 3 HS-SPI, USB Host 2.0, USB OTG 2.0 operating at high speed (480Mbps), 4 SD Host & High Speed Multi-Media Card Interface and 4 PLLs for clock generation.

Package on Package (POP) option with MCP is available for small form factor applications.

Page Link's: 1  2  3  4  5  6  7  8  9  10  More Pages 

部品番号
コンポーネント説明
PDF
メーカー
MT9M024 Evaluation Board User's Manual
ON Semiconductor
STK672 Series Evaluation Board User's Manual
ON Semiconductor
USER’S MANUAL
Hynix Semiconductor
TMPA8895CSNG7E35 manual
Toshiba
SERVICE MANUAL
Sony Semiconductor
SERVICE MANUAL
Sony Semiconductor
Hardware Manual
Hitachi -> Renesas Electronics
TV SERVICE MANUAL
Unspecified
MICROPROCESSORS USER’S MANUAL
Freescale Semiconductor
Evaluation Board Manual
Signal Processing Technologies

Share Link: GO URL

EnglishEnglish Korean한국어 Japanese日本語 Russianрусский Spanishespañol

All Rights Reserved© datasheetbank.com  [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]