Renesas MCUs
160-MHz, 32-bit RX MCU, on-chip FPU, 928 CoreMark, Supportive of 5V power supply, up to 1-MB flash memory, up to 128-KB SRAM, 32-KB data flash memory, 16-KB SRAM with ECC, Simultaneous sampling with 3 units of 12-bit A/D converter (up to 7 channels), Single-end/pseudo differential input supportive amplifier (6 channels), Analog comparator (6 channels), 160 MHz PWM (4 channels for 3-phase complementary, 2 channels for 5-phase complementary, 10 channels for single-phase complementary), 4-channel high-resolution PWM with resolution of 195 ps at the minimum, Host/function or OTG controller with full-speed USB 2.0 transfer, CAN, Encryption functions (optional)
FEATUREs
◾ 32-bit RXv3 CPU core
• Maximum operating frequency: 160 MHz
Capable of 928 CoreMark in operation at 160 MHz
• JTAG and FINE (one-line) debugging interfaces
◾ Low-power design and architecture
• Operation from a single 2.7- to 5.5-V supply
• Four low-power modes
◾ On-chip code flash memory
• Supports versions with 1 Mbytes/512 Kbytes/256 Kbytes
• No wait cycles at up to 120 MHz or when the ROM cache is hit
• User code is programmable by on-board or off-board programming.
◾ On-chip data flash memory
• 32 Kbytes, reprogrammable up to 100,000 times
• Programming/erasing as background operations (BGOs)
◾ On-chip SRAM, no wait states
• 128K/64 Kbytes of SRAM (no wait states)
• 16 Kbytes of RAM with ECC (with wait)
◾ Data transfer
• DMACa: 8 channels
• DTCa: 1 channel
◾ ELC
• Module operation can be initiated by event signals without using
interrupts
• Linked operation between modules is possible when the CPU is in
sleep mode
◾ Reset and supply management
• Power-on reset (POR)
• Low voltage detection (LVDA) with voltage settings
◾ Clock functions
• Frequency of resonator for main clock oscillator: 8 to 24 MHz (this
can be used as the PLL reference clock)
• High-speed on-chip oscillator: 16 MHz/18 MHz/20 MHz (this can
be used as the PLL reference clock)
• Low-speed on-chip oscillator: 240 kHz
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