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PSD311R データシート - Waferscale Integration

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部品番号
PSD311R

コンポーネント説明

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88 Pages

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Waferscale
Waferscale Integration Waferscale

Introduction
The low cost PSD3XX family integrates high-performance and user-configurable blocks of EPROM, programmable logic, and optional SRAM into one part. The PSD3XX products also provide a powerful microcontroller interface that eliminates the need for external “glue logic”. The part’s integration, small form factor, low power consumption, and ease of use make it the ideal part for interfacing to virtually any microcontroller.

The major functional blocks of the PSD3XX include:
    • Two programmable logic arrays
    • 256Kb to 1 Mb of EPROM
    • Optional 16 Kb SRAM
    • Input latches
    • Programmable I/O ports
    • Page logic
    • Programmable security.


KEY FEATUREs
❏ Single-chip programmable peripheral for microcontroller-based applications
❏ 256K to 1 Mbit of UV EPROM with the following features:
    • Configurable as 32, 64, or 128 K x 8; or as 16, 32, or 64 K x 16
    • Divided into eight equally-sized mappable blocks for optimized address mapping
    • As fast as 70 ns access time, which includes address decoding
❏ Optional 16 Kbit SRAM is configurable as 2K x 8 or 1K x 16. The access time can be as quick as 70 ns, including address decoding.
❏ 19 I/O pins that can be individually configured for :
    • Microcontroller I/O port expansion
    • Programmable Address decoder (PAD) I/O
    • Latched address output
    • Open-drain or CMOS output
❏ Two Programmable Arrays (PAD A and PAD B) replace your PLD or decoder, and have the following features:
    • Up to 18 Inputs and 24 outputs
    • 40 Product terms (13 for PAD A and 27 for PAD B)
    • Ability to decode up to 1 MB of address without paging
❏ Microcontroller logic that eliminates the need for external “glue logic” has the following features:
    • Ability to interface to multiplexed and non-multiplexed buses
    • Built-in address latches for multiplexed address/data bus
    • ALE and Reset polarity are programmable (Reset polarity not programmable on
    V-versions)
    • Multiple configurations are possible for interface to many different microcontrollers
❏ Optional built-in page logic expands the MCU address space by up to 16 times
❏ Programmable power management with standby current as low as 1µA for low-voltage version
    • CMiser bit—programmable option to reduce AC power consumption in memory
    • Turbo Bit (ZPSD only)—programmable bit to reduce AC and DC power consumption in the PADs.
❏ Track Mode that allows other microcontrollers or host processors to share access to the local data bus
❏ Built-in security locks the device and PAD decoding configuration
❏ Wide Operating Voltage Range
    • V-versions: 2.7 to 5.5 volts
    • Others: 4.5 to 5.5 volts
❏ Available in a variety of packaging (44-pin PLDCC, CLDCC, TQFP, and PQFP)
❏ Simple, menu-driven software (PSDsoft) allows configuration and design entry on a PC.


APPLICATIONs
❏ Telecommunications:
    • Cellular phone
    • Digital PBX
    • Digital speech
    • FAX
    • Digital Signal Processing (DSP)
❏ Portable Industrial Equipment:
    • Industrial control
    • Measurement meters
    • Data recorders
❏ Instrumentation
❏ Medical Instrumentation:
    • Hearing aids
    • Monitoring equipment
    • Diagnostic tools
❏ Computers—notebooks, portable PCs, and palm-top computers:
    • Peripheral control (fixed disks, laser printers, etc.)
    • Modem Interface
    • MCU peripheral interface

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部品番号
コンポーネント説明
PDF
メーカー
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