Description
The PI6C184-02 is a high-speed low-noise 1-13 non-inverting buffer designed for SDRAM clock buffer applications.
This buffer is intended to be used with the PI6C104 clock generator for Intel Architecture for both desktop and mobile systems.
At power up all SDRAM output are enabled and active. The I2C Serial control may be used to individually activate/deactivate any of the 13 output drivers.

FEATUREs
• High speed, low noise non-inverting 1-13 buffer
• Supports up to four SDRAM DIMMs
• Low skew (<250ps) between any two output clocks
• I2C Serial Configuration interface
• Multiple VDD, VSS pins for noise reduction
• 3.3V power supply voltage
• 28-pin SSOP and SOIC packages (H, S)