Description
The PDM41257 is a high-performance CMOS static RAM organized as 262,144 x 1 bit. Writing to this device is accomplished when the write enable (WE) and the chip enable (CE) inputs are both LOW. Reading is accomplished when WE remains HIGH and CE goes LOW.

FEATUREs
□ High-speed access times
    Com’l: 7, 8, 10, 12 and 15 ns
    Industrial: 8, 10, 12 and 15 ns
□ Low power operation (typical)
    - PDM41257SA
        Active: 400 mW
        Standby: 150 mW
    - PDM41257LA
        Active: 350 mW
        Standby: 25 mW
□ Single +5V (±10%) power supply
□ TTL compatible inputs and outputs
□ Packages
    Plastic SOJ (300 mil) - SO