[Performance-Semiconductor]

DESCRIPTION
The P4C1981/L and P4C1982/L are 65,536-bit (16Kx4) ultra high-speed static RAMs similar to the P4C198, but with separate data I/O pins. The P4C1981/L feature a transparent write operation when OE is low; the outputs of the P4C1982/L are in high impedance during the write cycle. All devices have low power standby modes. The RAMs operate from a single 5V ± 10% tolerance power supply. With battery backup, data integrity is maintained for supply voltages down to 2.0V. Current drain is typically 10 µA from 2.0V supply.

FEATURES
■ Full CMOS, 6T Cell
■ High Speed (Equal Access and Cycle Times)
   – 10/12/15/20/25 ns (Commercial)
   – 12/15/20/25/35 ns (Industrial)
   – 15/20/25/35/45 ns (Military)
■ Low Power Operation (Commercial/Military)
   – 715 mW Active – 12/15
   – 550/660 mW Active – 20/25/35/45
   – 193/220 mW Standby (TTL Input)
   – 83/110 mW Standby (CMOS Input) P4C1981/1981L
   – 5.5 mW Standby (CMOS Input) P4C1981L/82L (Military)
■ Output Enable and Dual Chip Enable Functions
■ 5V ± 10% Power Supply
■ Data Retention with 2.0V Supply, 10 µA Typical Current (P4C1981L/1982L (Military)
■ Separate Inputs and Outputs
   – P4C1981/L Input Data at Outputs during Write
   – P4C1982/L Outputs in High Z during Write
■ Fully TTL Compatible Inputs and Outputs
■ Standard Pinout (JEDEC Approved)
   – 28-Pin 300 mil DIP, SOJ
   – 28-Pin 350 x 550 mil LCC