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MT28C3224P18 データシート - Micron Technology

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部品番号
MT28C3224P18

コンポーネント説明

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42 Pages

File Size
465.7 kB

メーカー
Micron
Micron Technology Micron

GENERAL DESCRIPTION
The MT28C3224P20 and MT28C3224P18 combination Flash and SRAM memory devices provide a compact, low-power solution for systems where PCB real estate is at a premium. The dual-bank Flash devices are high-performance, high-density, nonvolatile memory with a revolutionary architecture that can significantly improve system performance.


FEATURES
• Flexible dual-bank architecture
• Support for true concurrent operations with no latency:
    Read bank b during program bank a and vice versa
    Read bank b during erase bank a and vice versa
• Organization: 2,048K x 16 (Flash) 256K x 16 (SRAM)
• Basic configuration: Flash Bank a (8Mb Flash for data storage)
        – Eight 4K-word parameter blocks
        – Fifteen 32K-word blocks
    Bank b (24Mb Flash for program storage)
        – Forty-eight 32K-word main blocks
    SRAM 4Mb SRAM for data storage – 256K-words
• F_VCC, VCCQ, F_VPP, S_VCC voltages
    MT28C3224P20
        1.80V (MIN)/2.20V (MAX) F_VCC read voltage
        1.80V (MIN)/2.20V (MAX) S_VCC read voltage
        1.80V (MIN)/2.20V (MAX) VCCQ
    MT28C3224P18
        1.70V (MIN)/1.90V (MAX) F_VCC read voltage
        1.70V (MIN)/1.90V (MAX) S_VCC read voltage
        1.70V (MIN)/1.90V (MAX) VCCQ
    MT28C3224P20/P18
        1.80V (TYP) F_VPP (in-system PROGRAM/ERASE)
        1.0V (MIN) S_VCC (SRAM data retention)
        12V ±5% (HV) F_VPP (production programming compatibility)
• Asynchronous access time
    Flash access time: 80ns @ 1.80V F_VCC
    SRAM access time: 85ns @ 1.80V S_VCC
• Page Mode read access
    Interpage read access: 80ns @ 1.80V F_VCC
    Intrapage read access: 30ns @ 1.80V F_VCC
• Low power consumption
• Enhanced suspend options
    ERASE-SUSPEND-to-READ within same bank
    PROGRAM-SUSPEND-to-READ within same bank
    ERASE-SUSPEND-to-PROGRAM within same bank
• Read/Write SRAM during program/erase of Flash
• Dual 64-bit chip protection registers for security purposes
• PROGRAM/ERASE cycles 100,000 WRITE/ERASE cycles per block
• Cross-compatible command set support Extended command set Common flash interface (CFI) compliant

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部品番号
コンポーネント説明
PDF
メーカー
FLASH AND SRAM COMBO MEMORY
Micron Technology
FLASH AND SRAM COMBO MEMORY
Micron Technology
FLASH AND SRAM COMBO MEMORY
Micron Technology
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