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MPC5200B(2006) データシート - Freescale Semiconductor

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部品番号
MPC5200B

コンポーネント説明

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  2008   lastest PDF  

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78 Pages

File Size
704.4 kB

メーカー
Freescale
Freescale Semiconductor Freescale

Overview
The MPC5200B integrates a high performance MPC603e series e300 core with a rich set of peripheral functions focused on communications and systems integration. The e300 core design is based on the PowerPC® core architecture. MPC5200B incorporates an innovative BestComm I/O subsystem, which isolates routine maintenance of peripheral functions from the embedded e300 core. The MPC5200B contains a SDRAM/DDR Memory Controller, a flexible External Bus Interface, PCI Controller, USB, ATA, Ethernet, six Programmable Serial Controllers (PSC), I2C, SPI, CAN, J1850, Timers, and GPIOs.


FEATUREs
Key features are shown below.
• MPC603e series e300 core
    — Superscalar architecture
    — 760 MIPS at 400 MHz (-40 to +85 oC)
    — 16 k Instruction cache, 16 k Data cache
    — Double precision FPU
    — Instruction and Data MMU
    — Standard and Critical interrupt capability
• SDRAM / DDR Memory Interface
    — up to 133-MHz operation
    — SDRAM and DDR SDRAM support
    — 256-MByte addressing range per CS, two CS available
    — 32-bit data bus
    — Built-in initialization and refresh
• Flexible multi-function External Bus Interface
    — Supports interfacing to ROM/Flash/SRAM memories or other memory mapped devices
    — 8 programmable Chip Selects
    — Non multiplexed data access using 8/16/32 bit databus with up to 26-bit address
    — Short or Long Burst capable
    — Multiplexed data access using 8/16/32 bit databus with up to 25-bit address
• Peripheral Component Interconnect (PCI) Controller
    — Version 2.2 PCI compatibility
    — PCI initiator and target operation
    — 32-bit PCI Address/Data bus
    — 33- and 66-MHz operation
    — PCI arbitration function
• ATA Controller
    — Version 4 ATA compatible external interface—IDE Disk Drive connectivity
• BestComm DMA subsystem
    — Intelligent virtual DMA Controller
    — Dedicated DMA channels to control peripheral reception and transmission
    — Local memory (SRAM 16 kBytes)
• 6 Programmable Serial Controllers (PSC), configurable for the following:
    — UART or RS232 interface
    — CODEC interface for Soft Modem, Master/Slave CODEC Mode, I2S and AC97
    — Full duplex SPI mode
    — IrDA mode from 2400 bps to 4 Mbps
• Fast Ethernet Controller (FEC)
    — Supports 100Mbps IEEE 802.3 MII, 10 Mbps IEEE 802.3 MII, 10 Mbps 7-wire interface
• Universal Serial Bus Controller (USB)
    — USB Revision 1.1 Host
    — Open Host Controller Interface (OHCI)
    — Integrated USB Hub, with two ports.
(Continue ...)

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