The MC10EP33 is an integrated ÷4 divider. The differential clock inputs and the VBB allow a differential, single–ended or AC coupled interface to the device. If used, the VBB output should be bypassed to ground with a 0.01µF capacitor.
The reset pin is asynchronous and is asserted on the rising edge. Upon power–up, the internal flip–flops will attain a random state; the reset allows for the synchronization of multiple EP33’s in a system.

• 320ps Propagation Delay
• 3 GHz Typical Toggle Frequency
• PECL mode: 3.0V to 5.5V VCC with VEE = 0V
• ECL mode: 0V VCC with VEE = –3.0V to –5.5V
• Internal Input Resistors: Pulldown on D, D
• Q Output will default LOW with inputs open or at VEE
• ESD Protection: >4KV HBM, >200V MM
• VBB Output
• New Differential Input Common Mode Range
• Moisture Sensitivity Level 1, Indefinite Time Out of Drypack
• Flammability Rating: UL–94 code V–0 @ 1/8”, Oxygen Index 28 to 34
• Transistor Count = 91 devices