256M Bit (16M x16) Synch Burst , Multi Bank SLC NOR Flash Memory

GENERAL DESCRIPTION
The K8A(56/57)15E featuring single 1.8V power supply is a 256Mbit Burst Multi Bank Flash Memory organized as 16Mx16. The memory architecture of the device is designed to divide its memory arrays into 256 blocks(Uniform block part)/259 blocks(Boot block part) with independent hardware protection. This block architecture provides highly flexible erase and program capability. The K8A(56/57)15E NOR Flash consists of sixteen banks. This device is capable of reading data from one bank while programming or erasing in the other bank.
Regarding read access time, the K8A5615E provides an 11ns burst access time and an 95ns initial access time at 66MHz. At 83MHz, the K8A5615E provides an 9ns burst access time and an 95ns initial access time. At 108MHz, the K8A5715E provides an 7ns burst access time and an 95ns initial access time. At 133MHz, the K8A5715E provides an 6ns burst access time and an 95ns initial access time.

FEATURES
• Single Voltage, 1.7V to 1.95V for Read and Write operations
• Organization
   - 16,777,216 x 16 bit ( Word Mode Only)
• Read While Program/Erase Operation
• Multiple Bank Architecture
   - 16 Banks (16Mb Partition)
• OTP Block : Extra 512-Word block
• Read Access Time (@ CL=30pF)
   - Asynchronous Random Access Time : 100ns
   - Synchronous Random Access Time :95ns
   - Burst Access Time :
      11ns(66Mhz) / 9ns(83Mhz) / 7ns (108MHz) / 6ns (133MHz)
• Page Mode Operation
   16Words Page access allows fast asynchronous read
   Page Read Access Time :
   18ns(66/83Mhz) / 15ns(108/133Mhz)
• Burst Length :
   - Continuous Linear Burst
   - Linear Burst : 8-word & 16-word with Wrap
• Block Architecture
   - Uniform block part (K8A(56/57)15EZC) : Two hundred fifty-six 64Kword blocks
   - Boot block part (K8A(56/57)15ET(B)C) : Four 16Kword blocks and two hundred fifty-five 64Kword blocks (Bank 0 contains four 16 Kword blocks and fifteen 64Kword blocks, Bank 1 ~ Bank 15 contain two hundred forty 64Kword blocks)
• Reduce program time using the VPP
• Support 32-word Buffer Program
• Power Consumption (Typical value, CL=30pF)
   - Synchronous Read Current : 35mA
   - Program/Erase Current : 25mA
   - Read While Program/Erase Current : 45mA
   - Standby Mode/Auto Sleep Mode : 30uA
• Block Protection/Unprotection
   - Using the software command sequence
   - Last two boot blocks are protected by WP=VIL
      (Boot block part : K8A(56/57)15ET(B)C)
   - Last one block (BA255) is protected by WP=VIL
      (Uniform block part : K8A(56/57)15EZC)
   - All blocks are protected by VPP=VIL
• Handshaking Feature
   - Provides host system with minimum latency by monitoring RDY
• Erase Suspend/Resume
• Program Suspend/Resume
• Unlock Bypass Program/Erase
• Hardware Reset (RESET)
• Deep Power Down Mode
• Data Polling and Toggle Bits
   - Provides a software method of detecting the status of program or erase completion
• Endurance
   - 100K Program/Erase Cycles Minimum
• Extended Temperature : -25°C ~ 85°C
• Support Common Flash Memory Interface
• Output Driver Control by Configuration Register
• Low Vcc Write Inhibit
• Package : TBD