DEVICE OVERVIEW
ISSIs 512Mb Synchronous DRAM achieves high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input.

FEATURES
•  Clock frequency: 200, 166, 143 MHz
•  Fully synchronous; all signals referenced to a positive clock edge
•  Internal bank for hiding row access/precharge
•  Power supply: Vdd/Vddq = 2.3V-3.6V   IS42/45SxxxxxD - Vdd/Vddq = 3.3V   IS42/45RxxxxxD - Vdd/Vddq = 2.5
•  LVTTL interface
•  Programmable burst length – (1, 2, 4, 8, full page)
•  Programmable burst sequence: Sequential/Interleave
•  Auto Refresh (CBR)
•  Self Refresh
•  8K refresh cycles every 64 ms
•  Random column address every clock cycle
•  Programmable CAS latency (2, 3 clocks)
•  Burst read/write and burst read/single write operations capability
•  Burst termination by burst stop and precharge command
•  Packages: x8/x16: 54-pin TSOP-II, 54-ball TF-BGA (x16 only) x32: 90-ball TF-BGA
•  Temperature Range: Commercial (0oC to +70oC) Industrial (-40oC to +85oC) Automotive, A1 (-40oC to +85oC) Automotive, A2 (-40oC to +105oC)