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ICS1892Y-14 データシート - Integrated Circuit Systems

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ICS1892Y-14

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ICST
Integrated Circuit Systems ICST

General
The ICS1892, an enhanced version of the ICS 1890, is a fully integrated, physical-layer device (PHY) that is compliant with both the 10Base-T and 100Base-TX CSMA/CD Ethernet Standard, ISO/IEC 8802-3.
The ICS1892 incorporates digital signal processing (DSP) in its Physical Medium Dependent (PMD) sublayer. As a result, it can transmit and receive data on unshielded twisted-pair (UTP) category 5 cable with attenuation in excess of 24 dB at 100 MHz. With this ICS-patented technology, the ICS1892 can virtually eliminate errors from killer packets.
The ICS1892 supports a broad range of applications: data terminal equipment (network interface cards and motherboards), switches, repeaters, bridges, and routers. Its Media Independent Interface (MII) supports direct chip-to-chip and motherboard-to-daughterboard connections as well as connections to an MII connector and cable. The ICS1892 also provides a Serial Management Interface for exchanging command and status information with a Station Management (STA) entity.
The ICS1892 Media Dependent Interface (MDI) can be configured to provide either half- or full-duplex operation at data rates of 10 MHz or 100 MHz. The MDI configuration can be done manually (with input pins or control register settings) or automatically (using the Auto-Negotiation features). When the ICS1892 Auto-Negotiation sublayer is enabled, it exchanges technology capability data with its remote link partner and automatically selects the highest-performance operating mode they have in common.


FEATUREs
• Supports category 5 cables with attenuation in excess of 24 dB at 100 MHz across a temperature range from -5° to +85° C
• DSP-based baseline wander correction to virtually eliminate killer packets across temperature range of from -5° to +85° C
• Low-power, 0.5-micron CMOS
• Single 5.0-V power supply.
• Single-chip, fully integrated PHY provides PCS, PMA, PMD, and AUTONEG sublayers of IEEE standard
• 10Base-T and 100Base-TX IEEE 802.3 compliant
• Fully integrated, DSP-based PMD includes:
– Adaptive equalization and baseline wander correction
– Transmit wave shaping and stream cipher scrambler
– MLT-3 encoder and NRZ/NRZI encoder
• Highly configurable design supports:
   – Node, repeater, and switch applications
   – Managed and unmanaged applications
   – 10M or 100M half- and full-duplex modes
   – Parallel detection
   – Auto-negotiation, with Next Page capabilities
• MAC/Repeater Interface can be configured as:
   – 10M or 100M Media Independent Interface
   – 100M Symbol Interface (bypasses the PCS)
   – 10M 7-wire Serial Interface
• Provides Loopback Modes for Diagnostic Functions
• Small Footprint 64-pin Low-Profile LQFP and MQFP packages available

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部品番号
コンポーネント説明
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メーカー
10Base-T/100Base-TX Integrated PHYceiver™
Integrated Circuit Systems
3.3V 10Base-T/100Base-TX Integrated PHYceiver™ ( Rev : 2002 )
Integrated Circuit Systems
3.3-V 10Base-T/100Base-TX Integrated PHYceiver™
Integrated Circuit Systems
10BASE-T/100BASE-TX Ethernet PHY
Unspecified
3.3-V 10Base-T/100Base-TX Integrated PHYceiver™
Integrated Circuit Systems
3.3-V 10Base-T/100Base-TX Integrated PHYceiver™
Integrated Circuit Systems
3.3-V 10Base-T/100Base-TX Integrated PHYceiver™
Integrated Device Technology
3.3-V 10Base-T/100Base-TX Integrated PHYceiver™ ( Rev : 2000 )
Integrated Circuit Systems
3.3-V 10Base-T/100Base-TX Integrated PHYceiver™
Integrated Device Technology
3.3 V 10Base-T/100Base-TX Integrated PHYceiver™
Integrated Circuit Systems

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