8M x 8-Bit Dynamic RAM (4k & 8k Refresh, EDO-version)

This HYB3164(5)805B is a 64 MBit dynamic RAM organized 8 388 608 by 8 bits. The device is fabricated in SIEMENS’most advanced 0,25 µm-CMOS silicon gate process technology. The circuit and process design allow this device to achieve high performance and low power dissipation. The HYB3164(5)805B operates with a single 3.3 +/-0.3V power supply and interfaces with either LVTTL or LVCMOS levels. Multiplexed address inputs permit the HYB 3164(5)400B to be packaged in a 400mil wide SOJ-32 or TSOP-32 plastic package. These packages provide high system bit densities and are compatible with commonly used automatic testing and insertion equipment.The HYB3164(5)805BTL parts have a very low power „sleep mode“ supported by Self Refresh.

Premininary Information
• 8 388 608 words by 4-bit organization
• 0 to 70 °C operating temperature
• Hyper Page Mode - EDO - operation
• Performance:
• Single + 3.3 V (± 0.3V) power supply
• Low power dissipation:
   max. 306 active mW ( HYB 3164805BJ/BT(L)-40)
   max. 252 active mW ( HYB 3164805BJ/BT(L)-50)
   max. 216 active mW ( HYB 3164805BJ/BT(L)-60)
   max. 486 active mW ( HYB 3165805BJ/BT(L)-40)
   max. 396 active mW ( HYB 3165805BJ/BT(L)-50)
   max. 324 active mW ( HYB 3165805BJ/BT(L)-60)
   7.2 mW standby (LVTTL)
   3.6 mW standby (LVMOS)
   720 µA standby for L-version
• Read, write, read-modify-write, CAS-before-RAS refresh (CBR), RAS-only refresh, hidden refresh
• Self refresh (L-version only)
• 8192 refresh cycles/128 ms , 13 R/ 10C addresses (HYB 3164805BJ/BT)
   4096 refresh cycles/ 64 ms , 12 R/ 11C addresses (HYB 3165805BJ/BT)
• 128 msec refresh period for L-versions
• Plastic Package: P-SOJ-32-1 400 mil HYB 3164(5)400BJ
                              P-TSOPII-32-1 400 mil HYB 3164(5)400BT(L)