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HY5S5B6GLF-6 データシート - Hynix Semiconductor

HY5S5B6GLF-6 image

部品番号
HY5S5B6GLF-6

コンポーネント説明

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page
52 Pages

File Size
621.6 kB

メーカー
Hynix
Hynix Semiconductor Hynix

DESCRIPTION
The Hynix HY5S5B6GLF(P) is suited for non-PC application which use the batteries such as PDAs, 2.5G and 3G cellular phones with internet access and multimedia capabilities, mini-notebook, handheld PCs.
The Hynix 256M Mobile SDRAM is 268,435,456-bit CMOS Mobile Synchronous DRAM(Mobile SDR), ideally suited for the main memory applications which requires large memory density and high bandwidth. It is organized as 4banks of 4,194,304x16.


FEATURES
● Standard SDRAM Protocol
● Clock Synchronization Operation
   - All the commands registered on positive edge of basic input clock (CLK)
● MULTIBANK OPERATION - Internal 4bank operation
   - During burst Read or Write operation, burst Read or Write for a different bank is performed.
   - During burst Read or Write operation, a different bank is activated and burst Read or Write for that bank is performed
   - During auto precharge burst Read or Write, burst Read or Write for a different bank is performed
● Power Supply Voltage : VDD = 1.8V, VDDQ = 1.8V
● LVCMOS compatible I/O Interface
● Low Voltage interface to reduce I/O power
● Programmable burst length: 1, 2, 4, 8 or full page
● Programmable Burst Type : sequential or interleaved
● Programmable CAS latency of 3
● Programmable Drive Strength
● Low Power Features
   - Programmable PASR(Partial Array Self Refresh)
   - Auto TCSR (Temperature Compensated Self Refresh)
   - Programmable DS (Drive Strength)
   - Deep Power Down Mode
● -25oC ~ 85oC Operation Temperature
   - Extended Temp. : -25oC ~ 85oC
● Package Type : 54ball, 0.8mm pitch FBGA (Lead Free, Lead), 8 x 10 [mm2], t=0.1mm max
                              HY5S5B6GLFP : Lead Free
                              HY5S5B6GLF : Leaded


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