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DM9801A データシート - Davicom Semiconductor, Inc.

DM9801A image

部品番号
DM9801A

Other PDF
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page
60 Pages

File Size
595.8 kB

メーカー
Davicom
Davicom Semiconductor, Inc. Davicom

General Description
   The DM9801A is a physical-layer, single-chip, low-power transceiver for 1M Home Phoneline Network applications. On the media side, it provides an interface to a Home Phoneline wiring system. The reconciliation layer interfaces to the DM9801A either through an IEEE802.3u subset Media Independent Interface (MII) or a pseudo-standard General Purpose Serial Interface (GPSI). A management interface is provided by MDIO/MDC when operating in MII mode, or a Serial Peripheral Interface bus when operating in GPSI mode.


FEATUREs
• 1M Home Phoneline Network physical-layer, singlechip transceiver
• Compatible with HomePNA 1M PHY specification
   version 1.1 and HomePNA certification document
   version 1.0
• Supports the MII including the MDIO/MDC serial
   management interface
• Supports the GPSI including a SPI serial
   management interface
• Supports Link Integrity function
• Smart equalizer circuit for 1M receiver
• Supports Patent Pending 4-wire operation
• Supports hardware or software speed select
• Supports Interrupt on change, eliminates
   management polling
• Flexible built-in LED support for TX Activity, RX
   Activity and Collision Indication or Activity, Link state
   and Collision
• Digital PLL circuit using advanced digital algorithm to
   reduce jitter
• Low-power, high-performance CMOS process
• Available in a small outline 100-pin LQFP
• 3.3V DC power with 5V DC tolerant I/O


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