Description
The Clear Logic CL7000 Laser Processed Logic Device (LPLDfi) family offers the ultimate combination of performance, flexibility, and cost. This family is a system level second source to Altera MAXfi 7000, 7000E, and 7000S products. For designs not requiring in-system reprogrammability, design verification can be performed using the programmable Altera devices, and Clear Logic LPLDs can be used for low cost, high volume production.
Clear Logics innovative laser-based technology eliminates NRE costs, test vector development, ordering minimums and long lead times. No re-simulation or re-layout is required, as the device uses a cell-based, PLD-like architecture. Clear Logics NoFaultfi technology ensures complete test coverage through the use of specialized testing modes which are transparent to the user.
The Clear Logic CL7000 Laser Processed Logic Device family is based upon a large array of macrocells. Each macrocell contains a logic array with five product terms, a product-term select matrix, and a configurable register. A group of sixteen macrocells forms a block. Laser-configured metal fuses implement logical functions and control signal routing.
Laser configuration provides reduced cost and enhanced performance. These inherent performance benefits include extremely consistent propagation delays, reduced power consumption, and improved immunity to noise and upset events.

KEY FEATUREs
◆ Laser Processed Logic Device (LPLD™) technology offers
   the ultimate combination of performance, flexibility, and
   low cost
◆ Functionally, architecturally, and electrically compatible
   with industry-standard Alterafi MAXfi 7000
◆ High Density
   - 2,500 Usable gates
   - 128 Macrocells
   - 120 Maximum user I/O pins
◆ Laser fuse technology provides very fast, dense
   interconnect routing
◆ Low current consumption
◆ Supports 3.3 volt or 5.0 volt I/O operation
◆ Alpha particle immune

Additional Information
For further information on designing with the CL7000 LPLD
family, please consult the following documents:
◆ AN-01: Requesting a First Article. This document provides
   instructions on how to submit a bitstream file for
   generation of first articles.
◆ AN-02: Clear Logic Packaging Guide. This document provides
   specifications and drawings for packages used by the CL7000
   family.
◆ AN-09: CL7000 Technology White Paper. This document
   outlines the technologies employed by the CL7000 LPLD
   family.
◆ AN-10: Calculating CL7000 Power Consumption. This
   document provides guidelines for calculating power
   consumption based on design characteristics.
◆ AN-11: CL7000 Test Methodology. This document discribes
   how Clear Logic provides 100% stuck-at fault coverage.
◆ AN-12: CL7000 LPLD Timing and Function Compatability.
   This document shows how a seamless conversion from CPLD
   to ASIC can be achieve with no additional engineering with
   Clear Logic.