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CD4532BMS データシート - Intersil

CD4532BMS image

部品番号
CD4532BMS

コンポーネント説明

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9 Pages

File Size
82.5 kB

メーカー
Intersil
Intersil Intersil

Description
CD4532BMS consists of combinational logic that encodes the highest priority input (D7 - D0) to a 3-bit binary code. The eight inputs, D7 through D0, each have an assigned priority; D7 is the highest priority and D0 is the lowest. The priority encoder is inhibited when the chip-enable input E1 is low. When E1 is high, the binary representation of the highestpriority input appears on output lines Q2 - Q0, and the group select line GS is high to indicate that priority inputs are present. The enable-out (EO) is high when no priority inputs are present. If any one input is high, EO is low and all cascaded lower-order stages are disabled.


FEATUREs
• High Voltage Type (20V Rating)
• Converts From 1 of 8 to Binary
• Provides Cascading Feature to Handle Any Number of Inputs
• Group Select Indicates One or More Priority Inputs
• Standardized Symmetrical Output Characteristics
• 100% Tested for Quiescent Current at 20V
• Maximum Input Current of 1µA at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC
• Noise Margin (Over Full Package/Temperature Range)
    - 0.5V at VDD = 5V
    - 1.5V at VDD = 10V
    - 1.5V at VDD = 15V
• 5V, 10V and 15V Parametric Ratings
• Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ‘B’ Series CMOS Devices”


APPLICATIONs
• Priority Encoder
• Binary or BCD Encoder (Keyboard Encoding)
• Floating Point Arithmetic

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部品番号
コンポーネント説明
PDF
メーカー
8−Bit Priority Encoder
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8-Bit Priority Encoder
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8−Input Priority Encoder
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Motorola => Freescale
8-Input Priority Encoder
Motorola => Freescale

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