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AT91SAM9G25-CU(2013) データシート - Atmel Corporation

SAM9G25 image

部品番号
AT91SAM9G25-CU

コンポーネント説明

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Atmel
Atmel Corporation Atmel

Description
Based on the ARM926EJ-S™ core, the SAM9G25 is an embedded microprocessor unit, running at 400 MHz and featuring connectivity peripherals, a high data bandwidth architecture and a small footprint package option, making it an optimized solution for industrial applications.


FEATUREs
● Core
   ● ARM926EJ-S™ ARM® Thumb® Processor running at up to 400 MHz @ 1.0V +/- 10%
   ● 16 Kbytes Data Cache, 16 Kbytes Instruction Cache, Memory Management Unit
● Memories
   ● One 64-Kbyte internal ROM embedding bootstrap routine: Boot on NAND Flash, SDCard, DataFlash® or serial DataFlash. Programmable order.
   ● One 32-Kbyte internal SRAM, single-cycle access at system speed
   ● High Bandwidth Multi-port DDR2 Controller
   ● 32-bit External Bus Interface supporting 4-bank and 8-bank DDR2/LPDDR, SDR/LPSDR, Static Memories
   ● MLC/SLC 8-bit NAND Controller, with up to 24-bit Programmable Multibit Error Correcting Code (PMECC)
● System running at up to 133 MHz
   ● Power-on Reset Cells, Reset Controller, Shut Down Controller, Periodic Interval Timer, Watchdog Timer and Real Time Clock
   ● Boot Mode Select Option, Remap Command
   ● Internal Low Power 32 kHz RC and Fast 12 MHz RC Oscillators
   ● Selectable 32768 Hz Low-power Oscillator and 12 MHz Oscillator
   ● One PLL for the system and one PLL at 480 MHz optimized for USB High Speed
   ● Twelve 32-bit-layer AHB Bus Matrix for large Bandwidth transfers
   ● Dual Peripheral Bridge with dedicated programmable clock for best performance
   ● Two dual port 8-channel DMA Controllers
   ● Advanced Interrupt Controller and Debug Unit
   ● Two Programmable External Clock Signals
● Low Power Mode
   ● Shut Down Controller with four 32-bit Battery Backup Registers
   ● Clock Generator and Power Management Controller
   ● Very Slow Clock Operating Mode, Software Programmable Power Optimization Capabilities
● Peripherals
   ● ITU-R BT. 601/656 Image Sensor Interface
   ● USB Device High Speed, USB Host High Speed and USB Host Full Speed with dedicated On-Chip Transceiver
   ● One 10/100 Mbps Ethernet MAC Controller
   ● Two High Speed Memory Card Hosts
   ● Two Master/Slave Serial Peripheral Interface
   ● Two 3-channel 32-bit Timer/Counters
   ● One Synchronous Serial Controller
   ● One 4-channel 16-bit PWM Controller
   ● Three Two-wire Interfaces
   ● Four USARTs, two UARTs, one DBGU
   ● One 12-channel 10-bit Analog-to-Digital Converter
   ● Soft Modem
   ● Write Protected Registers
● I/O
   ● Four 32-bit Parallel Input/Output Controllers
   ● 105 Programmable I/O Lines Multiplexed with up to Three Peripheral I/Os
   ● Input Change Interrupt Capability on Each I/O Line, optional Schmitt trigger input
   ● Individually Programmable Open-drain, Pull-up and pull-down resistor, Synchronous Output
● Packages
   ● 217-ball BGA, pitch 0.8 mm
   ● 247-ball TFBGA, pitch 0.5 mm
   ● 247-ball VFBGA, pitch 0.5 mm

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