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AT89C5121 データシート - Atmel Corporation

83C5121-IL image

部品番号
AT89C5121

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115 Pages

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Atmel
Atmel Corporation Atmel

Description
T8xC5121 is a high performance CMOS ROM/CRAM derivative of the 80C51 CMOS single chip 8-bit microcontrollers.


FEATUREs
• 80C51 Core
    – 12 or 6 Clocks per Instruction (X1 and X2 Modes)
    – 256 Bytes Scratchpad RAM
    – Dual Data Pointer
    – Two 16-bit Timer/Counters: T0 and T1
• T83C5121 with 16 Kbytes Mask ROM
• T85C5121 with 16 Kbytes Code RAM
• T89C5121 with 16 Kbytes Code RAM and 16 Kbytes EEPROM
• On-chip Expanded RAM (XRAM): 256 Bytes
• Versatile Host Serial Interface
    – Full-duplex Enhanced UART (EUART) with Dedicated Baud Rate Generator (BRG): Most Standard Speeds up to 230K bits/s at 7.36 MHz
    – Output Enable Input
    – Multiple Logic Level Shifters Options (1.8V to VCC)
    – Automatic Level Shifter Option
• Multi-protocol Smart Card Interface
    – Certified with Dedicated Firmware According to ISO 7816, EMV2000, GIE-CB, GSM 11.12V and WHQL Standards
    – Asynchronous Protocols T = 0 and T = 1 with Direct and Inverse Modes
    – Baud Rate Generator Supporting All ISO7816 Speeds up to D = 32/F = 372
    – Parity Error Detection and Indication
    – Automatic Character Repetition on Parity Errors
    – Programmable Timeout Detection
    – Card Clock Stop High or Low for Card Power-down Mode
    – Support Synchronous Card with C4 and C8 Programmable Outputs
    – Card Detection and Automatic De-activation Sequence
    – Step-up/down Converter with Programmable Voltage Output: 5V, 3V (± 8% at 60 mA) and 1.8V (±8% at 20 mA)
    – Direct Connection to Smart Card Terminals: Short Circuit Current Limitation Logic Level Shifters
    4 kV ESD Protection (MIL/STD 833 Class 3)
• Alternate Card Support with CLK, I/O and RST According to GSM 11.12V Standard
• 2x I/O Ports: 6 I/O Port1 and 8 I/O Port3
• 2x LED Outputs with Programmable Current Sources: 2, 4, or 10 mA
• Hardware Watchdog
• Reset Output Includes
    – Hardware Watchdog Reset
    – Power-on Reset (POR)
    – Power-fail Detector (PFD)
• 4-level Priority Interrupt System with 7 Sources
• 7.36 to 16 MHz On-chip Oscillator with Clock Prescaler
• Absolute CPU Maximal Frequency: 16 MHz in X1 mode, 8MHz in X2 mode
• Idle and Power-down Modes
• Voltage Operation: 2.85V to 5.4V
• Low Power Consumption
    – 8 mA Operating Current (at 5.4V and 3.68 MHz)
    – 150 mA Maximum Current with Smart Card Power-on (at 16 MHz X1 Mode)
    – 30 μA Maximum Power-down Current at 3.0V (without Smart Card)
    – 100 μA Maximum Power-down Current at 5.4V (without Smart Card)
• Temperature Range
    – Commercial: 0 to +70°C Operating Temperature
    – Industrial: -40 to +85°C Operating Temperature
• Packages
    – SSOP24
    – QFN32
    – PLCC52

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