Description
The AT32UC3A is a complete System-On-Chip microcontroller based on the AVR32 UC RISC processor running at frequencies up to 66 MHz. AVR32 UC is a high-performance 32-bit RISC microprocessor core, designed for cost-sensitive embedded applications, with particular emphasis on low power consumption, high code density and high performance.

FEATUREs
• High Performance, Low Power 32-Bit Atmel® AVR® Microcontroller
    – Compact Single-cycle RISC Instruction Set Including DSP Instruction Set
    – Read-Modify-Write Instructions and Atomic Bit Manipulation
    – Performing 1.49 DMIPS / MHz
        Up to 91 DMIPS Running at 66 MHz from Flash (1 Wait-State)
        Up to 49 DMIPS Running at 33MHz from Flash (0 Wait-State)
    – Memory Protection Unit
• Multi-hierarchy Bus System
    – High-Performance Data Transfers on Separate Buses for Increased Performance
    – 15 Peripheral DMA Channels Improves Speed for Peripheral Communication
• Internal High-Speed Flash
    – 512K Bytes, 256K Bytes, 128K Bytes Versions
    – Single Cycle Access up to 33 MHz
    – Prefetch Buffer Optimizing Instruction Execution at Maximum Speed
    – 4ms Page Programming Time and 8ms Full-Chip Erase Time
    – 100,000 Write Cycles, 15-year Data Retention Capability
    – Flash Security Locks and User Defined Configuration Area
• Internal High-Speed SRAM, Single-Cycle Access at Full Speed
    – 64K Bytes (512KB and 256KB Flash), 32K Bytes (128KB Flash)
• External Memory Interface on AT32UC3A0 Derivatives
    – SDRAM / SRAM Compatible Memory Bus (16-bit Data and 24-bit Address Buses)
• Interrupt Controller
    – Autovectored Low Latency Interrupt Service with Programmable Priority
• System Functions
    – Power and Clock Manager Including Internal RC Clock and One 32KHz Oscillator
    – Two Multipurpose Oscillators and Two Phase-Lock-Loop (PLL) allowing Independant CPU Frequency from USB Frequency
    – Watchdog Timer, Real-Time Clock Timer
• Universal Serial Bus (USB)
    – Device 2.0 Full Speed and On-The-Go (OTG) Low Speed and Full Speed
    – Flexible End-Point Configuration and Management with Dedicated DMA Channels
    – On-chip Transceivers Including Pull-Ups
• Ethernet MAC 10/100 Mbps interface
    – 802.3 Ethernet Media Access Controller
    – Supports Media Independent Interface (MII) and Reduced MII (RMII)
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