GENERAL DESCRIPTION
The TDA8961 is an Advanced Television Systems Committee (ATSC)-compliant demodulator and FEC decoder for reception of 8-VSB modulated signals for terrestrial and cable applications:
• Terrestrial: reception of 8-VSB modulated signals via
standard 6 MHz VHF/UHF terrestrial TV channels (TV
channels 2 to 69 in the United States).
• Cable: reception of 8-VSB modulated signals via
standard 6 MHz VHF/UHF cable TV channels.
FEATURES
General features
• One-chip ATSC-compliant demodulator and
concatenated trellis (Viterbi)/Reed Solomon decoder
with de-interleaver and de-randomizer
• 0.35 µm process
• 3.3 V device
• QFP80 package
• Boundary Scan Test (BST)
• 12 MHz external clock
• 36 MHz output for external D/A converter
• Parallel or serial MPEG-2 transport stream output.
8-Vestigial Side Band (VSB) demodulator
• Accepts 10-bit IF data sampled at 36 MHz
• 6 MHz wide IF signal, centered at 4 MHz
• On-chip digital circuitry for tuner AGC
• Square-root raised-cosine filter with 11.5% roll-off factor
• Fully internal carrier recovery loop
• No need for external voltage controlled crystal oscillator
due to internal sample rate converter
• Fully internal symbol timing recovery with
programmable loop filters
• Technology to handle dynamic multipath conditions.
Adaptive equalizer
• Including feed forward and feedback sections with
Decision Feedback Equalizer (DFE) structure
• Range of −2.3 to +22.5 µs by default (in conjunction with
external software, −2.3 to +80 µs)
• Adaptation based on ATSC field sync (trained) and/or
8-VSB data (blind).
NTSC co-channel interference filter
Patented NTSC co-channel interference technology with
low noise penalty.
On-chip forward error correction
• Trellis (Viterbi) decoder
• Rate 2⁄3 (Rate 1⁄2 Ungerboeck code based)
• (207, 187, T = 10) Reed Solomon code
• Internal convolutional de-interleaving (I = 52; using
internal memory)
• External indication of uncorrectable error;
transport_error_indicator bit in MPEG packet header is
also set
• De-randomizer based on ATSC standard
• Segment error rate readable through I2C.
I2C interface
I2C-bus interface to initialize and monitor the demodulator
and Forward Error Correction (FEC) decoder. An
operation without I2C-bus is possible (default).
System interfaces
• 8-bit wide or serial MPEG-2 transport stream interface
• ITU656 bypass mode
• MPEG-2 serial transport stream input to reduce external
components when the IC is combined in a system with a
Quadrature Amplitude Modulation (QAM), Quadrature
Phase Shift Keying (QPSK) or Orthogonal Frequency
Division Multiplexing (OFDM) channel decoder.
APPLICATIONS
• Digital ATSC compliant TV receiver
• Personal computers with digital television capabilities
• Set top-boxes.