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74F538SC データシート - Fairchild Semiconductor

74F538 image

部品番号
74F538SC

コンポーネント説明

Other PDF
  2004  

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page
8 Pages

File Size
73.3 kB

メーカー
Fairchild
Fairchild Semiconductor Fairchild

General Description
The 74F538 decoder/demultiplexer accepts three Address (A0–A2) input signals and decodes them to select one of eight mutually exclusive outputs. A polarity control input (P) determines whether the outputs are active LOW or active HIGH. A HIGH Signal on either of the active LOW Output Enable (OE) inputs forces all outputs to the high impedance state. Two active HIGH and two active LOW input enables are available for easy expansion to 1-of 32 decoding with four packages, or for data demultiplexing to 1-of-8 or 1-of-16 destinations.


FEATUREs
■ Output polarity control
■ Data demultiplexing capability
■ Multiple enables for expansion
■ 3-STATE outputs

Page Link's: 1  2  3  4  5  6  7  8 

部品番号
コンポーネント説明
PDF
メーカー
1-OF-8 DECODER WITH 3-STATE OUTPUTS
Motorola => Freescale
1-of-10 Decoder with 3-STATE Outputs
Fairchild Semiconductor
1-OF-10 DECODER WITH 3-STATE OUTPUTS
Motorola => Freescale
1-of-8 decoder (3-State)
Philips Electronics
1-of-8 Decoder with 3-State Output
Hitachi -> Renesas Electronics
Dual 1-of-4 Decoder with 3-STATE Outputs
Fairchild Semiconductor
DUAL 1-OF-4 DECODER WITH 3-STATE OUTPUTS
Motorola => Freescale
1-of-10 decoder (3-State)
Philips Electronics
1 of 8 Data Selectors/Multiplexers (with 3-state outputs)
Hitachi -> Renesas Electronics
1 of 8 Data Selectors/Multiplexers (with 3-state outputs)
Renesas Electronics

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