mPD78062Y,78063Y,78064Y
5.6 A/D CONVERTER
Eight 8-bit resolution A/D converter channels are incorporated.
The following two types of start-up method are available.
Ý Hardware start
Ý Software start
Fig. 5-8 A/D Converter Block Diagram
H
ANI0/P10
ANI1/P11
ANI2/P12
ANI3/P13
ANI4/P14
ANI5/P15
ANI6/P16
ANI7/P17
Selec-
tor
Series Resistor String
Sample & Hold Circuit
Voltage Comparator
Tap
Selec-
tor
4
Successive Approximation
Register (SAR)
AVDD
AVREF
AVSS
INTP3/P03
Edge
Detector
Control
Circuit
A/D Conversion Result
Register (ADCR)
INTAD
INTP3
Internal Bus
5.7 SERIAL INTERFACE
Two clocked serial interface channels are incorporated.
Ý Serial interface channel 0
Ý Serial interface channel 2
Table 5-3 Serial Interface Channel Block Diagram
H
Function
3-wire serial I/O mode
2-wire serial I/O mode
Asynchronous serial interface
(UART) mode
I2C bus mode
Serial Interface Channel 0
l (MSB/LSB-first switchable)
l (MSB-first)
——
l (MSB-first)
Serial Interface Channel 2
l (MSB/LSB-first switchable)
——
l (Dedicated baud rate generator
incorpoorated)
——
23