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UT54LVDS032LVT-UPA データシートの表示(PDF) - Aeroflex UTMC

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UT54LVDS032LVT-UPA Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
AC SWITCHING CHARACTERISTICS1, 2, 3
(VDD = +3.3V + 0.3V, TA = -55 °C to +125 °C)
SYMBOL
PARAMETER
MIN
MAX
UNIT
tPHLD 6
Differential Propagation Delay High to Low
CL = 10pf (figures 4 and 5)
1.0
4.0
ns
tPLHD 6
Differential Propagation Delay Low to High
CL = 10pf (figures 4 and 5)
1.0
4.0
ns
tSK
4
D
Differential Skew (tPHLD - tPLHD) (figures 4 and 5)
0
0.35
ns
tSK 1 4
tSK 2 4
tTLH4
Channel-to-Channel Skew1 (figures 4 and 5)
Chip-to-Chip Skew5 (figures 4 and 5)
Rise Time (figures 4 and 5)
0
0.5
ns
1.5
ns
1.2
ns
tTHL4
Fall Time (figures 4 and 5)
1.2
ns
tPH
4
Z
tPLZ4
tPZH 4
tPZL4
Disable Time High to Z (figures 6 and 7)
Disable Time Low to Z (figures 6 and 7)
Enable Time Z to High (figures 6 and 7)
Enable Time Z to Low (figures 6 and 7)
12
ns
12
T12
EN 12
ns
ns
ns
Notes:
1. Channel-to-Channel Skew is defined as the difference between the propagation delay of the channel and the other channels in t he same chip with an event on the inputs.
2. Generator waveform for all tests unless otherwise specified: f = 1 MHz, Z0 = 50, tr and t f (0% - 100%) < 1ns for RIN and tr and tf < 1ns for EN or EN.
M 3. CL includes probe and jig capacitance.
4. Guaranteed by characterization.
5. Chip to Chip Skew is defined as the difference between the minimum and maximum specified differential propagation delays.
DEVELOP 6. May be tested at higher load capacitance and the limit interpolated from characterization data to guarantee this parameter.
IN
6

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