W78E51B データシートの表示（PDF） - Winbond

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W78E51B

8-BIT MTP MICROCONTROLLER

Winbond 

Preliminary W78E51B

1. INT2 / INT3

Two additional external interrupts, INT2 and INT3 , whose functions are similar to those of external

interrupt 0 and 1 in the standard 80C52. The functions/status of these interrupts are

determined/shown by the bits in the XICON (External Interrupt Control) register. The XICON register

is bit-addressable but is not a standard register in the standard 80C52. Its address is at 0C0H. To

set/clear bits in the XICON register, one can use the "SETB (/CLR) bit" instruction. For example,

"SETB 0C2H" sets the EX2 bit of XICON.

XICON - external interrupt control (C0H)

PX3

EX3

IE3

IT3

PX2

EX2

IE2

IT2

PX3: External interrupt 3 priority high if set

EX3: External interrupt 3 enable if set

IE3: If IT3 = 1, IE3 is set/cleared automatically by hardware when interrupt is detected/serviced

IT3: External interrupt 3 is falling-edge/low-level triggered when this bit is set/cleared by software

PX2: External interrupt 2 priority high if set

EX2: External interrupt 2 enable if set

IE2: If IT2 = 1, IE2 is set/cleared automatically by hardware when interrupt is detected/serviced

IT2: External interrupt 2 is falling-edge/low-level triggered when this bit is set/cleared by software

Eight-source interrupt informations:

INTERRUPT

SOURCE

External Interrupt 0

Timer/Counter 0

External Interrupt 1

Timer/Counter 1

Serial Port

External Interrupt 2

External Interrupt 3

VECTOR

ADDRESS

03H

0BH

13H

1BH

23H

33H

3BH

POLLING

SEQUENCE WITHIN

PRIORITY LEVEL

0 (highest)

1

2

3

4

5

6 (lowest)

ENABLE

REQUIRED

SETTINGS

IE.0

IE.1

IE.2

IE.3

IE.4

XICON.2

XICON.6

INTERRUPT

TYPE

EDGE/LEVEL

TCON.0

-

TCON.2

-

-

XICON.0

XICON.3

2. PORT4

Another bit-addressable port P4 is also available and only 4 bits (P4<3:0>) can be used. This port

address is located at 0D8H with the same function as that of port P1, except the P4.3 and P4.2 are

alternative function pins. It can be used as general I/O pins or external interrupt input sources (INT2 ,

INT3 ).

Example:

P4

MOV

MOV

SETB

CLR

REG 0D8H

P4, #0AH ; Output data "A" through P4.0−P4.3.

A, P4

; Read P4 status to Accumulator.

P4.0

; Set bit P4.0

P4.1

; Clear bit P4.1

Publication Release Date: December 1998

-5-

Revision A1

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