IDT54FCT88915TT133L データシートの表示（PDF） - Integrated Device Technology
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IDT54FCT88915TT133L Datasheet PDF : 11 Pages
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IDT54/74FCT88915TT 55/70/100/133
LOW SKEW PLL-BASED CMOS CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
The frequency relationship shown here is applicable to all
Q outputs (Q0, Q1, Q2, Q3 and Q4).
25MHz feedback signal
50MHz signal
1:2 INPUT TO "Q" OUTPUT FREQUENCY
RELATIONSHIP
In this application, the Q/2 output is connected to the
FEEDBACK input. The internal PLL will line up the positive
edges of Q/2 and SYNC, thus the Q/2 frequency will equal the
SYNC frequency. The Q outputs (Q0-Q4, Q5) will always run
at 2X the Q/2 frequency, and the 2Q output will run at 4X the
Q/2 frequency.
50MHz signal
12.5MHz feedback signal
LOW
25MHz
input
HIGH
RST Q5
Q4
FEEDBACK
REF_SEL
SYNC(0)
VCC(AN) FCT88915TT
LF
GND(AN)
2Q
Q/2
12.5MHz
signal
Q3
25MHz
"Q"
Clock
Outputs
Q2
HIGH
FQ_SEL
Q0
Q1 PLL_EN
LOW
12.5 MHz
input
RST Q5
FEEDBACK
REF_SEL
Q4 2Q
Q/2
SYNC(0)
Q3
VCC(AN) FCT88915TT
LF
Q2
GND(AN)
FQ_SEL
Q0
Q1 PLL_EN
HIGH
HIGH
25MHz
"Q"
Clock
Outputs
3072 drw 07
Allowable Input Frequency Range:
10MHz to (f2Q FMAX Spec /4 (for FREQ_SEL HIGH)
5MHz to (f2Q FMAX Spec /8 (for FREQ_SEL LOW)
HIGH
HIGH
Allowable Input Frequency Range:
3072 drw 08
20MHz to (f2Q FMAX Spec)/2 (for FREQ_SEL HIGH)
10MHz to (f2Q FMAX Spec)/4 (for FREQ_SEL LOW)
Figure 2b. Wiring Diagram and Frequency Relationships With Q4
Output Feedback
2:1 INPUT TO "Q" OUTPUT FREQUENCY
RELATIONSHIP
In this application, the 2Q output is connected to the
FEEDBACK input. The internal PLL will line up the positive
edges of 2Q and SYNC, thus the 2Q frequency will equal the
SYNC frequency. The Q/2 output will always run at 1/4 the
2Q frequency, and the Q output will run at 1/2 the 2Q
frequency.
50MHz feedback signal
HIGH
Figure 2a. Wiring Diagram and Frequency Relationships With Q/2
Output Feedback
1:1 INPUT TO "Q" OUTPUT FREQUENCY
RELATIONSHIP
LOW
50MHz
input
In this application, the Q4 output is connected to the
FEEDBACK input. The internal PLL will line up the positive
edges of Q4 and SYNC, thus the Q4 frequency (and the rest
of the "Q" outputs) will equal the SYNC frequency. The Q/2
output will always run at 1/2 the Q frequency, and the 2Q
output will run at 2X the Q frequency.
RST Q5
FEEDBACK
REF_SEL
Q4 2Q
Q/2
SYNC(0)
Q3
VCC(AN) FCT88915TT
LF
Q2
GND(AN)
FQ_SEL
Q0
Q1 PLL_EN
12.5MHz
input
25MHz
"Q"
Clock
Outputs
HIGH
HIGH
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Allowable Input Frequency Range:
40MHz to (f2Q FMAX Spec) (for FREQ_SEL HIGH)
20MHz to (f2Q FMAX Spec)/2 (for FREQ_SEL LOW)
Figure 2c. Wiring Diagram and Frequency Relationships With 2Q
Output Feedback
9.7
8
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