HEF40098B データシートの表示（PDF） - NXP Semiconductors.
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HEF40098B Datasheet PDF : 12 Pages
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NXP Semiconductors
HEF40098B
3-state hex inverting buffer
VI 90 %
tW
negative
pulse
VM
10 %
0V
tf
VI
positive
pulse
tr
90 %
VM
10 %
0V
tW
VM
tr
tf
VM
VI
G
VCC
VO
DUT
VEXT
RL
RT
CL
RL
001aae331
Fig 6.
Test data is given in Table 10.
Definitions for test circuit:
RL = Load resistance;
CL = Load capacitance including jig and probe capacitance;
RT = Termination resistance should be equal to output impedance Zo of the pulse generator;
VEXT = External voltage for measuring switching times.
Test circuitry for switching times
Table 10. Test data
Supply voltage
5 V to 15 V
Input
VI
VDD
tr, tf
≤ 20 ns
Load
CL
50 pF
RL
1 kΩ
VEXT
tPLH, tPHL
open
tPLZ, tPZL
2VDD
tPHZ, tPZH
GND
HEF40098B_5
Product data sheet
Rev. 05 — 31 October 2008
© NXP B.V. 2008. All rights reserved.
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